source: src/linux/laguna/linux-3.1/arch/powerpc/kernel/setup_32.c @ 17919

Last change on this file since 17919 was 17919, checked in by BrainSlayer, 18 months ago

update to 3.1.2
File size: 8.2 KB
Line 
1/*
2 * Common prep/pmac/chrp boot and setup code.
3 */
4
5#include <linux/module.h>
6#include <linux/string.h>
7#include <linux/sched.h>
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/reboot.h>
11#include <linux/delay.h>
12#include <linux/initrd.h>
13#include <linux/tty.h>
14#include <linux/bootmem.h>
15#include <linux/seq_file.h>
16#include <linux/root_dev.h>
17#include <linux/cpu.h>
18#include <linux/console.h>
19#include <linux/memblock.h>
20
21#include <asm/io.h>
22#include <asm/prom.h>
23#include <asm/processor.h>
24#include <asm/pgtable.h>
25#include <asm/setup.h>
26#include <asm/smp.h>
27#include <asm/elf.h>
28#include <asm/cputable.h>
29#include <asm/bootx.h>
30#include <asm/btext.h>
31#include <asm/machdep.h>
32#include <asm/uaccess.h>
33#include <asm/system.h>
34#include <asm/pmac_feature.h>
35#include <asm/sections.h>
36#include <asm/nvram.h>
37#include <asm/xmon.h>
38#include <asm/time.h>
39#include <asm/serial.h>
40#include <asm/udbg.h>
41#include <asm/mmu_context.h>
42
43#include "setup.h"
44
45#define DBG(fmt...)
46
47extern void bootx_init(unsigned long r4, unsigned long phys);
48
49int boot_cpuid = -1;
50EXPORT_SYMBOL_GPL(boot_cpuid);
51int boot_cpuid_phys;
52EXPORT_SYMBOL_GPL(boot_cpuid_phys);
53
54int smp_hw_index[NR_CPUS];
55
56unsigned long ISA_DMA_THRESHOLD;
57unsigned int DMA_MODE_READ;
58unsigned int DMA_MODE_WRITE;
59
60#ifdef CONFIG_VGA_CONSOLE
61unsigned long vgacon_remap_base;
62EXPORT_SYMBOL(vgacon_remap_base);
63#endif
64
65/*
66 * These are used in binfmt_elf.c to put aux entries on the stack
67 * for each elf executable being started.
68 */
69int dcache_bsize;
70int icache_bsize;
71int ucache_bsize;
72
73/*
74 * We're called here very early in the boot.  We determine the machine
75 * type and call the appropriate low-level setup functions.
76 *  -- Cort <cort@fsmlabs.com>
77 *
78 * Note that the kernel may be running at an address which is different
79 * from the address that it was linked at, so we must use RELOC/PTRRELOC
80 * to access static data (including strings).  -- paulus
81 */
82notrace unsigned long __init early_init(unsigned long dt_ptr)
83{
84        unsigned long offset = reloc_offset();
85        struct cpu_spec *spec;
86
87        /* First zero the BSS -- use memset_io, some platforms don't have
88         * caches on yet */
89        memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
90                        __bss_stop - __bss_start);
91
92        /*
93         * Identify the CPU type and fix up code sections
94         * that depend on which cpu we have.
95         */
96        spec = identify_cpu(offset, mfspr(SPRN_PVR));
97
98        do_feature_fixups(spec->cpu_features,
99                          PTRRELOC(&__start___ftr_fixup),
100                          PTRRELOC(&__stop___ftr_fixup));
101
102        do_feature_fixups(spec->mmu_features,
103                          PTRRELOC(&__start___mmu_ftr_fixup),
104                          PTRRELOC(&__stop___mmu_ftr_fixup));
105
106        do_lwsync_fixups(spec->cpu_features,
107                         PTRRELOC(&__start___lwsync_fixup),
108                         PTRRELOC(&__stop___lwsync_fixup));
109
110        do_final_fixups();
111
112        return KERNELBASE + offset;
113}
114
115
116/*
117 * Find out what kind of machine we're on and save any data we need
118 * from the early boot process (devtree is copied on pmac by prom_init()).
119 * This is called very early on the boot process, after a minimal
120 * MMU environment has been set up but before MMU_init is called.
121 */
122notrace void __init machine_init(unsigned long dt_ptr)
123{
124        lockdep_init();
125
126        /* Enable early debugging if any specified (see udbg.h) */
127        udbg_early_init();
128
129        /* Do some early initialization based on the flat device tree */
130        early_init_devtree(__va(dt_ptr));
131
132        early_init_mmu();
133
134        probe_machine();
135
136        setup_kdump_trampoline();
137
138#ifdef CONFIG_6xx
139        if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
140            cpu_has_feature(CPU_FTR_CAN_NAP))
141                ppc_md.power_save = ppc6xx_idle;
142#endif
143
144#ifdef CONFIG_E500
145        if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
146            cpu_has_feature(CPU_FTR_CAN_NAP))
147                ppc_md.power_save = e500_idle;
148#endif
149        if (ppc_md.progress)
150                ppc_md.progress("id mach(): done", 0x200);
151}
152
153#ifdef CONFIG_BOOKE_WDT
154/* Checks wdt=x and wdt_period=xx command-line option */
155notrace int __init early_parse_wdt(char *p)
156{
157        if (p && strncmp(p, "0", 1) != 0)
158               booke_wdt_enabled = 1;
159
160        return 0;
161}
162early_param("wdt", early_parse_wdt);
163
164int __init early_parse_wdt_period (char *p)
165{
166        if (p)
167                booke_wdt_period = simple_strtoul(p, NULL, 0);
168
169        return 0;
170}
171early_param("wdt_period", early_parse_wdt_period);
172#endif  /* CONFIG_BOOKE_WDT */
173
174/* Checks "l2cr=xxxx" command-line option */
175int __init ppc_setup_l2cr(char *str)
176{
177        if (cpu_has_feature(CPU_FTR_L2CR)) {
178                unsigned long val = simple_strtoul(str, NULL, 0);
179                printk(KERN_INFO "l2cr set to %lx\n", val);
180                _set_L2CR(0);           /* force invalidate by disable cache */
181                _set_L2CR(val);         /* and enable it */
182        }
183        return 1;
184}
185__setup("l2cr=", ppc_setup_l2cr);
186
187/* Checks "l3cr=xxxx" command-line option */
188int __init ppc_setup_l3cr(char *str)
189{
190        if (cpu_has_feature(CPU_FTR_L3CR)) {
191                unsigned long val = simple_strtoul(str, NULL, 0);
192                printk(KERN_INFO "l3cr set to %lx\n", val);
193                _set_L3CR(val);         /* and enable it */
194        }
195        return 1;
196}
197__setup("l3cr=", ppc_setup_l3cr);
198
199#ifdef CONFIG_GENERIC_NVRAM
200
201/* Generic nvram hooks used by drivers/char/gen_nvram.c */
202unsigned char nvram_read_byte(int addr)
203{
204        if (ppc_md.nvram_read_val)
205                return ppc_md.nvram_read_val(addr);
206        return 0xff;
207}
208EXPORT_SYMBOL(nvram_read_byte);
209
210void nvram_write_byte(unsigned char val, int addr)
211{
212        if (ppc_md.nvram_write_val)
213                ppc_md.nvram_write_val(addr, val);
214}
215EXPORT_SYMBOL(nvram_write_byte);
216
217ssize_t nvram_get_size(void)
218{
219        if (ppc_md.nvram_size)
220                return ppc_md.nvram_size();
221        return -1;
222}
223EXPORT_SYMBOL(nvram_get_size);
224
225void nvram_sync(void)
226{
227        if (ppc_md.nvram_sync)
228                ppc_md.nvram_sync();
229}
230EXPORT_SYMBOL(nvram_sync);
231
232#endif /* CONFIG_NVRAM */
233
234int __init ppc_init(void)
235{
236        /* clear the progress line */
237        if (ppc_md.progress)
238                ppc_md.progress("             ", 0xffff);
239
240        /* call platform init */
241        if (ppc_md.init != NULL) {
242                ppc_md.init();
243        }
244        return 0;
245}
246
247arch_initcall(ppc_init);
248
249static void __init irqstack_early_init(void)
250{
251        unsigned int i;
252
253        /* interrupt stacks must be in lowmem, we get that for free on ppc32
254         * as the memblock is limited to lowmem by default */
255        for_each_possible_cpu(i) {
256                softirq_ctx[i] = (struct thread_info *)
257                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
258                hardirq_ctx[i] = (struct thread_info *)
259                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
260        }
261}
262
263#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
264static void __init exc_lvl_early_init(void)
265{
266        unsigned int i, hw_cpu;
267
268        /* interrupt stacks must be in lowmem, we get that for free on ppc32
269         * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
270        for_each_possible_cpu(i) {
271                hw_cpu = get_hard_smp_processor_id(i);
272                critirq_ctx[hw_cpu] = (struct thread_info *)
273                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
274#ifdef CONFIG_BOOKE
275                dbgirq_ctx[hw_cpu] = (struct thread_info *)
276                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
277                mcheckirq_ctx[hw_cpu] = (struct thread_info *)
278                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
279#endif
280        }
281}
282#else
283#define exc_lvl_early_init()
284#endif
285
286/* Warning, IO base is not yet inited */
287void __init setup_arch(char **cmdline_p)
288{
289        *cmdline_p = cmd_line;
290
291        /* so udelay does something sensible, assume <= 1000 bogomips */
292        loops_per_jiffy = 500000000 / HZ;
293
294        unflatten_device_tree();
295        check_for_initrd();
296
297        if (ppc_md.init_early)
298                ppc_md.init_early();
299
300        find_legacy_serial_ports();
301
302        smp_setup_cpu_maps();
303
304        /* Register early console */
305        register_early_udbg_console();
306
307        xmon_setup();
308
309        /*
310         * Set cache line size based on type of cpu as a default.
311         * Systems with OF can look in the properties on the cpu node(s)
312         * for a possibly more accurate value.
313         */
314        dcache_bsize = cur_cpu_spec->dcache_bsize;
315        icache_bsize = cur_cpu_spec->icache_bsize;
316        ucache_bsize = 0;
317        if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
318                ucache_bsize = icache_bsize = dcache_bsize;
319
320        /* reboot on panic */
321        panic_timeout = 180;
322
323        if (ppc_md.panic)
324                setup_panic();
325
326        init_mm.start_code = (unsigned long)_stext;
327        init_mm.end_code = (unsigned long) _etext;
328        init_mm.end_data = (unsigned long) _edata;
329        init_mm.brk = klimit;
330
331        exc_lvl_early_init();
332
333        irqstack_early_init();
334
335        /* set up the bootmem stuff with available memory */
336        do_init_bootmem();
337        if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
338
339#ifdef CONFIG_DUMMY_CONSOLE
340        conswitchp = &dummy_con;
341#endif
342
343        if (ppc_md.setup_arch)
344                ppc_md.setup_arch();
345        if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
346
347        paging_init();
348
349        /* Initialize the MMU context management stuff */
350        mmu_context_init();
351
352}
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