source: src/linux/universal/linux-3.18/arch/mips/brcm-boards/bcm947xx/setup.c @ 27514

Last change on this file since 27514 was 27514, checked in by kong, 23 months ago

offsets for wnr3500lv2

File size: 16.1 KB
Line 
1/*
2 * HND MIPS boards setup routines
3 *
4 * Copyright (C) 2012, Broadcom Corporation. All Rights Reserved.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
13 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
15 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
16 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 * $Id: setup.c,v 1.23 2010-10-20 08:26:12 $
19 */
20
21#include <linux/types.h>
22#include <linux/version.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/serial.h>
26#include <linux/serialP.h>
27#include <linux/serial_core.h>
28#include <linux/serial_8250.h>  /* for early_serial_setup */
29#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
30#include <linux/config.h>
31#endif
32#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
33#include <linux/blkdev.h>
34#include <linux/ide.h>
35#endif
36#include <asm/bootinfo.h>
37#include <asm/cpu.h>
38#include <asm/time.h>
39#include <asm/reboot.h>
40#include <linux/squashfs_fs.h>
41
42#ifdef CONFIG_MTD
43#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h>
45#include <linux/mtd/partitions.h>
46#include <linux/romfs_fs.h>
47#include <linux/cramfs_fs.h>
48#endif
49#ifdef CONFIG_BLK_DEV_INITRD
50#include <linux/initrd.h>
51#endif
52#include <typedefs.h>
53#include <osl.h>
54#include <bcmutils.h>
55#include <bcmnvram.h>
56#include <siutils.h>
57#include <hndsoc.h>
58#include <hndcpu.h>
59#include <mips33_core.h>
60#include <mips74k_core.h>
61#include <sbchipc.h>
62#include <hndchipc.h>
63#include <hndpci.h>
64#include <trxhdr.h>
65#ifdef HNDCTF
66#include <ctf/hndctf.h>
67#endif /* HNDCTF */
68#include "bcm947xx.h"
69#ifdef CONFIG_MTD_NFLASH
70#include "nflash.h"
71#endif
72#include "bcmdevs.h"
73
74extern void bcm947xx_time_init(void);
75extern void bcm947xx_timer_setup(struct irqaction *irq);
76
77#ifdef CONFIG_KGDB
78extern void set_debug_traps(void);
79extern void rs_kgdb_hook(struct uart_port *);
80extern void breakpoint(void);
81#endif
82
83#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
84extern struct ide_ops std_ide_ops;
85#endif
86
87struct dummy_super_block {
88        u32     s_magic ;
89};
90
91/* Global SB handle */
92si_t *bcm947xx_sih = NULL;
93DEFINE_SPINLOCK(bcm947xx_sih_lock);
94EXPORT_SYMBOL(bcm947xx_sih);
95EXPORT_SYMBOL(bcm947xx_sih_lock);
96
97/* Convenience */
98#define sih bcm947xx_sih
99#define sih_lock bcm947xx_sih_lock
100
101#ifdef HNDCTF
102ctf_t *kcih = NULL;
103EXPORT_SYMBOL(kcih);
104ctf_attach_t ctf_attach_fn = NULL;
105EXPORT_SYMBOL(ctf_attach_fn);
106#endif /* HNDCTF */
107
108/* Kernel command line */
109#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
110extern char arcs_cmdline[CL_SIZE];
111#endif
112static int lanports_enable = 0;
113
114
115EXPORT_SYMBOL( si_router_coma );        /* for loadable modules */
116EXPORT_SYMBOL( hnd_jtagm_init );
117EXPORT_SYMBOL( hnd_jtagm_disable );
118EXPORT_SYMBOL( jtag_scan );
119
120static void
121bcm947xx_reboot_handler(void)
122{
123#ifndef BCMDBG
124        int wombo_reset;
125#endif /* BCMDBG */
126
127        /* Reset the PCI(e) interfaces */
128        if (CHIPID(sih->chip) == BCM4706_CHIP_ID)
129                hndpci_deinit(sih);
130
131        if (lanports_enable) {
132                uint lp = 1 << lanports_enable;
133
134                si_gpioout(sih, lp, 0, GPIO_DRV_PRIORITY);
135                si_gpioouten(sih, lp, lp, GPIO_DRV_PRIORITY);
136                bcm_mdelay(1);
137        }
138
139#ifndef BCMDBG
140        /* gpio 0 is also valid wombo_reset */
141        if ((wombo_reset = getgpiopin(NULL, "wombo_reset", GPIO_PIN_NOTDEFINED)) !=
142            GPIO_PIN_NOTDEFINED) {
143                int reset = 1 << wombo_reset;
144
145                si_gpioout(sih, reset, 0, GPIO_DRV_PRIORITY);
146                si_gpioouten(sih, reset, reset, GPIO_DRV_PRIORITY);
147                bcm_mdelay(10);
148        }
149#endif /* BCMDBG */
150}
151
152void
153bcm947xx_machine_restart(char *command)
154{
155        printk("Please stand by while rebooting the system...\n");
156
157        /* Set the watchdog timer to reset immediately */
158        local_irq_disable();
159        bcm947xx_reboot_handler();
160        hnd_cpu_reset(sih);
161}
162
163void
164bcm947xx_machine_halt(void)
165{
166        printk("System halted\n");
167
168        /* Disable interrupts and watchdog and spin forever */
169        local_irq_disable();
170        si_watchdog(sih, 0);
171        bcm947xx_reboot_handler();
172        while (1);
173}
174
175#ifdef CONFIG_SERIAL_CORE
176
177static struct uart_port rs = {
178        line: 0,
179        flags: ASYNC_BOOT_AUTOCONF,
180        iotype: SERIAL_IO_MEM,
181};
182
183static void __init
184serial_add(void *regs, uint irq, uint baud_base, uint reg_shift)
185{
186        rs.membase = regs;
187        rs.irq = irq + 2;
188        rs.uartclk = baud_base;
189        rs.regshift = reg_shift;
190
191        early_serial_setup(&rs);
192
193        rs.line++;
194}
195
196static void __init
197serial_setup(si_t *sih)
198{
199        si_serial_init(sih, serial_add);
200
201#ifdef CONFIG_KGDB
202        /* Use the last port for kernel debugging */
203        if (rs.membase)
204                rs_kgdb_hook(&rs);
205#endif
206}
207
208#endif /* CONFIG_SERIAL_CORE */
209
210
211
212int boot_flags(void)
213{
214        int bootflags = 0;
215        char *val;
216
217        /* Only support chipcommon revision == 38 or BCM4706 for now */
218        if ((CHIPID(sih->chip) == BCM4706_CHIP_ID) || sih->ccrev == 38) {
219                if (sih->ccrev == 38 && (sih->chipst & (1 << 4)) != 0) {
220                        /* This is NANDBOOT */
221                        bootflags = FLASH_BOOT_NFLASH | FLASH_KERNEL_NFLASH;
222                }
223                else if ((val = nvram_get("bootflags"))) {
224                        bootflags = simple_strtol(val, NULL, 0);
225                        bootflags &= FLASH_KERNEL_NFLASH;
226                }
227        }
228
229        return bootflags;
230}
231
232static int rootfs_mtdblock(void)
233{
234        int bootflags;
235        int block = 0;
236
237        bootflags = boot_flags();
238
239        /* NANDBOOT */
240        if ((bootflags & (FLASH_BOOT_NFLASH | FLASH_KERNEL_NFLASH)) ==
241                (FLASH_BOOT_NFLASH | FLASH_KERNEL_NFLASH))
242                return 3;
243
244        /* SFLASH/PFLASH only */
245        if ((bootflags & (FLASH_BOOT_NFLASH | FLASH_KERNEL_NFLASH)) == 0)
246                return 2;
247
248#ifdef BCMCONFMTD
249        block++;
250#endif
251        /* Boot from norflash and kernel in nandflash */
252        return block+3;
253}
254int iswrt350n=0;
255int iswrt300n11=0;
256EXPORT_SYMBOL (iswrt350n);
257EXPORT_SYMBOL (iswrt300n11);
258
259void __init
260brcm_setup(void)
261{
262        char *value;
263
264        /* Get global SB handle */
265        sih = si_kattach(SI_OSH);
266
267        /* Initialize clocks and interrupts */
268        si_mips_init(sih, SBMIPS_VIRTIRQ_BASE);
269
270        if (BCM330X(current_cpu_data.processor_id) &&
271                (read_c0_diag() & BRCM_PFC_AVAIL)) {
272                /*
273                 * Now that the sih is inited set the  proper PFC value
274                 */     
275                printk("Setting the PFC to its default value\n");
276                enable_pfc(PFC_AUTO);
277        }
278
279
280#ifdef CONFIG_SERIAL_CORE
281        /* Initialize UARTs */
282        serial_setup(sih);
283#endif /* CONFIG_SERIAL_CORE */
284
285iswrt350n=1;
286iswrt300n11=1;
287char *boardtype = nvram_get("boardtype");
288char *boothwmodel = nvram_get("boot_hw_model");
289char *boothwver = nvram_get("boot_hw_ver");
290char *cardbus = nvram_get("cardbus");
291if (boardtype==NULL || strcmp(boardtype,"0x478"))iswrt350n=0;
292if (cardbus!=NULL && !strcmp(cardbus, "0") && boardtype!=NULL && !strcmp(boardtype,"0x478"))
293    {
294    iswrt350n=0;
295    iswrt300n11=0;
296    }
297if (boothwmodel==NULL || strcmp(boothwmodel,"WRT300N"))iswrt300n11=0;
298if (boothwmodel!=NULL && !strcmp(boothwmodel,"WRT610N"))
299    {
300    iswrt300n11=0;
301    iswrt350n=0;
302    }
303if (boothwver==NULL || strcmp(boothwver,"1.1"))iswrt300n11=0;
304if (iswrt300n11)
305    iswrt350n=0;
306
307#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
308        ide_ops = &std_ide_ops;
309#endif
310
311        sprintf(arcs_cmdline, "root=/dev/mtdblock%d console=ttyS0,115200 init=/sbin/preinit", rootfs_mtdblock());
312
313        /* Override default command line arguments */
314        value = nvram_get("kernel_args");
315        if (value && strlen(value) && strncmp(value, "empty", 5))
316                strncpy(arcs_cmdline, value, sizeof(arcs_cmdline));
317
318
319        if ((lanports_enable = getgpiopin(NULL, "lanports_enable", GPIO_PIN_NOTDEFINED)) ==
320                GPIO_PIN_NOTDEFINED)
321                lanports_enable = 0;
322
323
324#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
325        /* Check if we want to enable cpu wait */
326        if (nvram_match("wait", "1"))
327                cpu_wait_enable = 1;
328#endif
329
330        /* Generic setup */
331        _machine_restart = bcm947xx_machine_restart;
332        _machine_halt = bcm947xx_machine_halt;
333        pm_power_off = bcm947xx_machine_halt;
334
335#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
336        board_time_init = bcm947xx_time_init;
337#endif
338}
339
340const char *
341get_system_type(void)
342{
343        static char s[32];
344
345        if (bcm947xx_sih) {
346                sprintf(s, "Broadcom BCM%X chip rev %d", bcm947xx_sih->chip,
347                        bcm947xx_sih->chiprev);
348                return s;
349        }
350        else
351                return "Broadcom BCM947XX";
352}
353
354void __init
355bus_error_init(void)
356{
357}
358
359void __init memory_setup(void);
360void __init
361plat_mem_setup(void)
362{
363        memory_setup();
364        brcm_setup();
365        return;
366}
367
368#ifdef CONFIG_MTD
369
370static spinlock_t *bcm_mtd_lock = NULL;
371
372spinlock_t *partitions_lock_init(void)
373{
374        if (!bcm_mtd_lock) {
375                bcm_mtd_lock = (spinlock_t *)kzalloc(sizeof(spinlock_t), GFP_KERNEL);
376                if (!bcm_mtd_lock)
377                        return NULL;
378
379                spin_lock_init( bcm_mtd_lock );
380        }
381        return bcm_mtd_lock;
382}
383EXPORT_SYMBOL(partitions_lock_init);
384
385static struct nand_hw_control *nand_hwcontrol = NULL;
386struct nand_hw_control *nand_hwcontrol_lock_init(void)
387{
388        if (!nand_hwcontrol) {
389                nand_hwcontrol = (struct nand_hw_control *)kzalloc(sizeof(struct nand_hw_control), GFP_KERNEL);
390                if (!nand_hwcontrol)
391                        return NULL;
392
393                spin_lock_init(&nand_hwcontrol->lock);
394                init_waitqueue_head(&nand_hwcontrol->wq);
395        }
396        return nand_hwcontrol;
397}
398EXPORT_SYMBOL(nand_hwcontrol_lock_init);
399
400/* Find out prom size */
401static uint32 boot_partition_size(uint32 flash_phys) {
402        uint32 bootsz, *bisz;
403
404        /* Default is 256K boot partition */
405        bootsz = 256 * 1024;
406
407        /* Do we have a self-describing binary image? */
408        bisz = (uint32 *)KSEG1ADDR(flash_phys + BISZ_OFFSET);
409        if (bisz[BISZ_MAGIC_IDX] == BISZ_MAGIC) {
410                int isz = bisz[BISZ_DATAEND_IDX] - bisz[BISZ_TXTST_IDX];
411
412                if (isz > (1024 * 1024))
413                        bootsz = 2048 * 1024;
414                else if (isz > (512 * 1024))
415                        bootsz = 1024 * 1024;
416                else if (isz > (256 * 1024))
417                        bootsz = 512 * 1024;
418                else if (isz <= (128 * 1024))
419                        bootsz = 128 * 1024;
420        }
421        return bootsz;
422}
423
424#if defined(BCMCONFMTD) && defined(PLC)
425#define FLASH_PARTS_NUM 7
426#elif defined(BCMCONFMTD) || defined(PLC)
427#define FLASH_PARTS_NUM 6
428#else
429#define FLASH_PARTS_NUM 5 /* boot;nvram;kernel;rootfs;empty */
430#endif
431
432
433#ifdef CONFIG_MTD_NFLASH
434#define NFLASH_PARTS_NUM        7
435static struct mtd_partition bcm947xx_nflash_parts[NFLASH_PARTS_NUM] = {{0}};
436int ddwrtoffset;
437int ddwrtsize;
438
439static uint lookup_nflash_rootfs_offset(hndnand_t *nfl, struct mtd_info *mtd, int offset, size_t size)
440{
441        struct romfs_super_block *romfsb;
442        struct cramfs_super *cramfsb;
443        struct squashfs_super_block *squashfsb;
444        struct trx_header *trx;
445        unsigned char buf[NFL_SECTOR_SIZE];
446        uint blocksize, mask, blk_offset, off, shift = 0;
447        int ret;
448       
449        romfsb = (struct romfs_super_block *) buf;
450        cramfsb = (struct cramfs_super *) buf;
451        squashfsb = (struct squashfs_super_block *) buf;
452        trx = (struct trx_header *) buf;
453
454
455        /* Look at every block boundary till 16MB; higher space is reserved for application data. */
456        blocksize = mtd->erasesize;
457        printk("lookup_nflash_rootfs_offset: offset = 0x%x\n", offset);
458        for (off = offset; off < NFL_BOOT_OS_SIZE; off += 4096) {
459                mask = blocksize - 1;
460                blk_offset = off & ~mask;
461                if (hndnand_checkbadb(nfl, blk_offset) != 0)
462                        continue;
463                memset(buf, 0xe5, sizeof(buf));
464                if ((ret = hndnand_read(nfl, off, sizeof(buf), buf)) != sizeof(buf)) {
465                        printk(KERN_NOTICE
466                               "%s: nflash_read return %d\n", mtd->name, ret);
467                        continue;
468                }
469                       
470                if (le32_to_cpu(trx->magic) == TRX_MAGIC)
471                {
472               
473                printk(KERN_NOTICE "found trx at %X, len =%d\n",off,trx->len);
474                int offset = le32_to_cpu(trx->offsets[2]) ? : le32_to_cpu(trx->offsets[1]);
475                offset+=off;
476                printk(KERN_NOTICE "scan filesys at %X\n",offset);
477
478                if ((ret = hndnand_read(nfl, offset, sizeof(buf), buf)) != sizeof(buf)) {
479                        printk(KERN_NOTICE
480                               "%s: nflash_read return %d\n", mtd->name, ret);
481                        continue;
482                }
483               
484                if (*((__u32 *) buf) == SQUASHFS_MAGIC) {
485                        printk(KERN_NOTICE
486                               "%s: squash filesystem with lzma found at offset %X\n",
487                               mtd->name, off );
488                int size = squashfsb->bytes_used;
489                //part->size = part->size + 1024; /* uncomment for belkin v2000 ! */
490                int len = offset + size;
491                len +=  (mtd->erasesize - 1);
492                len &= ~(mtd->erasesize - 1);
493                ddwrtoffset = len;
494                ddwrtsize = mtd->size - ddwrtoffset;
495                return offset;
496                }
497                }
498
499        }
500        return shift + off;
501}
502
503struct mtd_partition *
504init_nflash_mtd_partitions(hndnand_t *nfl, struct mtd_info *mtd, size_t size)
505{
506        int bootflags;
507        int nparts = 0;
508        uint32 offset = 0;
509        uint shift = 0;
510        uint32 top = 0;
511        uint32 bootsz;
512#ifdef CONFIG_FAILSAFE_UPGRADE
513        char *img_boot = nvram_get(BOOTPARTITION);
514        char *imag_1st_offset = nvram_get(IMAGE_FIRST_OFFSET);
515        char *imag_2nd_offset = nvram_get(IMAGE_SECOND_OFFSET);
516        unsigned int image_first_offset=0;
517        unsigned int image_second_offset=0;
518        char dual_image_on = 0;
519
520        /* The image_1st_size and image_2nd_size are necessary if the Flash does not have any
521         * image
522         */
523        dual_image_on = (img_boot != NULL && imag_1st_offset != NULL && imag_2nd_offset != NULL);
524
525        if (dual_image_on) {
526                image_first_offset = simple_strtol(imag_1st_offset, NULL, 10);
527                image_second_offset = simple_strtol(imag_2nd_offset, NULL, 10);
528                printk("The first offset=%x, 2nd offset=%x\n", image_first_offset,
529                        image_second_offset);
530
531        }
532#endif
533       
534        bootflags = boot_flags();
535        if ((bootflags & FLASH_BOOT_NFLASH) == FLASH_BOOT_NFLASH) {
536                bootsz = boot_partition_size(SI_FLASH1);
537                if (bootsz > mtd->erasesize) {
538                        /* Prepare double space in case of bad blocks */
539                        bootsz = (bootsz << 1);
540                } else {
541                        /* CFE occupies at least one block */
542                        bootsz = mtd->erasesize;
543                }
544                printk("Boot partition size = %d(0x%x)\n", bootsz, bootsz);
545
546                /* Size pmon */
547                bcm947xx_nflash_parts[nparts].name = "cfe";
548                bcm947xx_nflash_parts[nparts].size = bootsz;
549                bcm947xx_nflash_parts[nparts].offset = top;
550                bcm947xx_nflash_parts[nparts].mask_flags = 0;
551                offset = bcm947xx_nflash_parts[nparts].size;
552                nparts++;
553
554                /* Setup NVRAM MTD partition */
555                bcm947xx_nflash_parts[nparts].name = "nvram";
556                bcm947xx_nflash_parts[nparts].size = NFL_BOOT_SIZE - offset;
557                bcm947xx_nflash_parts[nparts].offset = offset;
558                       
559                offset = NFL_BOOT_SIZE;
560                nparts++;
561        }
562       
563        if (nvram_match("boardnum", "3500L") && nvram_match("boardtype", "0x052b"))
564                offset += 0x300000;
565
566
567        if ((bootflags & FLASH_KERNEL_NFLASH) == FLASH_KERNEL_NFLASH) {
568                /* Setup kernel MTD partition */
569                bcm947xx_nflash_parts[nparts].name = "nandimage";
570#ifdef CONFIG_FAILSAFE_UPGRADE
571                if (dual_image_on)
572                        bcm947xx_nflash_parts[nparts].size = image_second_offset - image_first_offset;
573                else
574#endif
575                bcm947xx_nflash_parts[nparts].size = nparts ? (NFL_BOOT_OS_SIZE - NFL_BOOT_SIZE) : NFL_BOOT_OS_SIZE;
576               
577                if (nvram_match("boardnum", "3500L") && nvram_match("boardtype", "0x052b"))
578                        bcm947xx_nflash_parts[nparts].size -= 0x300000;
579               
580                bcm947xx_nflash_parts[nparts].offset = offset;
581                       
582                shift = lookup_nflash_rootfs_offset(nfl, mtd, offset, bcm947xx_nflash_parts[nparts].size);
583
584#ifdef CONFIG_FAILSAFE_UPGRADE
585                if (dual_image_on)
586                        offset = image_second_offset;
587                else
588#endif
589                offset = NFL_BOOT_OS_SIZE;
590                nparts++;
591               
592                /* Setup rootfs MTD partition */
593                bcm947xx_nflash_parts[nparts].name = "rootfs";
594#ifdef CONFIG_FAILSAFE_UPGRADE
595                if (dual_image_on)
596                        bcm947xx_nflash_parts[nparts].size = image_second_offset - shift;
597                else
598#endif
599                bcm947xx_nflash_parts[nparts].size = NFL_BOOT_OS_SIZE - shift;
600                bcm947xx_nflash_parts[nparts].offset = shift;
601                bcm947xx_nflash_parts[nparts].mask_flags = MTD_WRITEABLE;
602                nparts++;
603
604//              bcm947xx_nflash_parts[nparts].name = "ddwrt";
605
606//              bcm947xx_nflash_parts[nparts].size = ddwrtsize-0x100000;
607//              bcm947xx_nflash_parts[nparts].offset = ddwrtoffset;
608               
609//              nparts++;
610
611#ifdef CONFIG_FAILSAFE_UPGRADE
612                /* Setup 2nd kernel MTD partition */
613                if (dual_image_on) {
614                        printf ("2nd offset %x \n",image_second_offset);
615                        bcm947xx_nflash_parts[nparts].name = "linux2";
616                        bcm947xx_nflash_parts[nparts].size = NFL_BOOT_OS_SIZE - image_second_offset;
617                        bcm947xx_nflash_parts[nparts].offset = image_second_offset;
618                        shift = lookup_nflash_rootfs_offset(nfl, mtd, image_second_offset,
619                                                            bcm947xx_nflash_parts[nparts].size);
620                        nparts++;
621                        /* Setup rootfs MTD partition */
622                        bcm947xx_nflash_parts[nparts].name = "rootfs2";
623                        bcm947xx_nflash_parts[nparts].size = NFL_BOOT_OS_SIZE - shift;
624                        bcm947xx_nflash_parts[nparts].offset = shift;
625                        bcm947xx_nflash_parts[nparts].mask_flags = MTD_WRITEABLE;
626                        nparts++;
627                }
628#endif
629
630        }
631
632        return bcm947xx_nflash_parts;
633}
634
635EXPORT_SYMBOL(init_nflash_mtd_partitions);
636#endif /* CONFIG_MTD_NFLASH */
637
638#endif
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