source: src/linux/universal/linux-3.18/arch/powerpc/kernel/setup_64.c @ 31885

Last change on this file since 31885 was 31885, checked in by brainslayer, 5 weeks ago

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1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 *      This program is free software; you can redistribute it and/or
8 *      modify it under the terms of the GNU General Public License
9 *      as published by the Free Software Foundation; either version
10 *      2 of the License, or (at your option) any later version.
11 */
12
13#define DEBUG
14
15#include <linux/export.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
23#include <linux/seq_file.h>
24#include <linux/ioport.h>
25#include <linux/console.h>
26#include <linux/utsname.h>
27#include <linux/tty.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
34#include <linux/bootmem.h>
35#include <linux/pci.h>
36#include <linux/lockdep.h>
37#include <linux/memblock.h>
38#include <linux/hugetlb.h>
39#include <linux/memory.h>
40
41#include <asm/io.h>
42#include <asm/kdump.h>
43#include <asm/prom.h>
44#include <asm/processor.h>
45#include <asm/pgtable.h>
46#include <asm/smp.h>
47#include <asm/elf.h>
48#include <asm/machdep.h>
49#include <asm/paca.h>
50#include <asm/time.h>
51#include <asm/cputable.h>
52#include <asm/sections.h>
53#include <asm/btext.h>
54#include <asm/nvram.h>
55#include <asm/setup.h>
56#include <asm/rtas.h>
57#include <asm/iommu.h>
58#include <asm/serial.h>
59#include <asm/cache.h>
60#include <asm/page.h>
61#include <asm/mmu.h>
62#include <asm/firmware.h>
63#include <asm/xmon.h>
64#include <asm/udbg.h>
65#include <asm/kexec.h>
66#include <asm/mmu_context.h>
67#include <asm/code-patching.h>
68#include <asm/kvm_ppc.h>
69#include <asm/hugetlb.h>
70#include <asm/epapr_hcalls.h>
71
72#ifdef DEBUG
73#define DBG(fmt...) udbg_printf(fmt)
74#else
75#define DBG(fmt...)
76#endif
77
78int spinning_secondaries;
79u64 ppc64_pft_size;
80
81/* Pick defaults since we might want to patch instructions
82 * before we've read this from the device tree.
83 */
84struct ppc64_caches ppc64_caches = {
85        .dline_size = 0x40,
86        .log_dline_size = 6,
87        .iline_size = 0x40,
88        .log_iline_size = 6
89};
90EXPORT_SYMBOL_GPL(ppc64_caches);
91
92/*
93 * These are used in binfmt_elf.c to put aux entries on the stack
94 * for each elf executable being started.
95 */
96int dcache_bsize;
97int icache_bsize;
98int ucache_bsize;
99
100#if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP)
101static void setup_tlb_core_data(void)
102{
103        int cpu;
104
105        BUILD_BUG_ON(offsetof(struct tlb_core_data, lock) != 0);
106
107        for_each_possible_cpu(cpu) {
108                int first = cpu_first_thread_sibling(cpu);
109
110                paca[cpu].tcd_ptr = &paca[first].tcd;
111
112                /*
113                 * If we have threads, we need either tlbsrx.
114                 * or e6500 tablewalk mode, or else TLB handlers
115                 * will be racy and could produce duplicate entries.
116                 */
117                if (smt_enabled_at_boot >= 2 &&
118                    !mmu_has_feature(MMU_FTR_USE_TLBRSRV) &&
119                    book3e_htw_mode != PPC_HTW_E6500) {
120                        /* Should we panic instead? */
121                        WARN_ONCE("%s: unsupported MMU configuration -- expect problems\n",
122                                  __func__);
123                }
124        }
125}
126#else
127static void setup_tlb_core_data(void)
128{
129}
130#endif
131
132#ifdef CONFIG_SMP
133
134static char *smt_enabled_cmdline;
135
136/* Look for ibm,smt-enabled OF option */
137static void check_smt_enabled(void)
138{
139        struct device_node *dn;
140        const char *smt_option;
141
142        /* Default to enabling all threads */
143        smt_enabled_at_boot = threads_per_core;
144
145        /* Allow the command line to overrule the OF option */
146        if (smt_enabled_cmdline) {
147                if (!strcmp(smt_enabled_cmdline, "on"))
148                        smt_enabled_at_boot = threads_per_core;
149                else if (!strcmp(smt_enabled_cmdline, "off"))
150                        smt_enabled_at_boot = 0;
151                else {
152                        int smt;
153                        int rc;
154
155                        rc = kstrtoint(smt_enabled_cmdline, 10, &smt);
156                        if (!rc)
157                                smt_enabled_at_boot =
158                                        min(threads_per_core, smt);
159                }
160        } else {
161                dn = of_find_node_by_path("/options");
162                if (dn) {
163                        smt_option = of_get_property(dn, "ibm,smt-enabled",
164                                                     NULL);
165
166                        if (smt_option) {
167                                if (!strcmp(smt_option, "on"))
168                                        smt_enabled_at_boot = threads_per_core;
169                                else if (!strcmp(smt_option, "off"))
170                                        smt_enabled_at_boot = 0;
171                        }
172
173                        of_node_put(dn);
174                }
175        }
176}
177
178/* Look for smt-enabled= cmdline option */
179static int __init early_smt_enabled(char *p)
180{
181        smt_enabled_cmdline = p;
182        return 0;
183}
184early_param("smt-enabled", early_smt_enabled);
185
186#else
187#define check_smt_enabled()
188#endif /* CONFIG_SMP */
189
190/** Fix up paca fields required for the boot cpu */
191static void fixup_boot_paca(void)
192{
193        /* The boot cpu is started */
194        get_paca()->cpu_start = 1;
195        /* Allow percpu accesses to work until we setup percpu data */
196        get_paca()->data_offset = 0;
197}
198
199static void cpu_ready_for_interrupts(void)
200{
201        /* Set IR and DR in PACA MSR */
202        get_paca()->kernel_msr = MSR_KERNEL;
203
204        /*
205         * Enable AIL if supported, and we are in hypervisor mode. If we are
206         * not in hypervisor mode, we enable relocation-on interrupts later
207         * in pSeries_setup_arch() using the H_SET_MODE hcall.
208         */
209        if (cpu_has_feature(CPU_FTR_HVMODE) &&
210            cpu_has_feature(CPU_FTR_ARCH_207S)) {
211                unsigned long lpcr = mfspr(SPRN_LPCR);
212                mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
213        }
214
215        /*
216         * Fixup HFSCR:TM based on CPU features. The bit is set by our
217         * early asm init because at that point we haven't updated our
218         * CPU features from firmware and device-tree. Here we have,
219         * so let's do it.
220         */
221        if (cpu_has_feature(CPU_FTR_HVMODE) && !cpu_has_feature(CPU_FTR_TM_COMP))
222                mtspr(SPRN_HFSCR, mfspr(SPRN_HFSCR) & ~HFSCR_TM);
223}
224
225/*
226 * Early initialization entry point. This is called by head.S
227 * with MMU translation disabled. We rely on the "feature" of
228 * the CPU that ignores the top 2 bits of the address in real
229 * mode so we can access kernel globals normally provided we
230 * only toy with things in the RMO region. From here, we do
231 * some early parsing of the device-tree to setup out MEMBLOCK
232 * data structures, and allocate & initialize the hash table
233 * and segment tables so we can start running with translation
234 * enabled.
235 *
236 * It is this function which will call the probe() callback of
237 * the various platform types and copy the matching one to the
238 * global ppc_md structure. Your platform can eventually do
239 * some very early initializations from the probe() routine, but
240 * this is not recommended, be very careful as, for example, the
241 * device-tree is not accessible via normal means at this point.
242 */
243
244void __init early_setup(unsigned long dt_ptr)
245{
246        static __initdata struct paca_struct boot_paca;
247
248        /* -------- printk is _NOT_ safe to use here ! ------- */
249
250        /* Identify CPU type */
251        identify_cpu(0, mfspr(SPRN_PVR));
252
253        /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
254        initialise_paca(&boot_paca, 0);
255        setup_paca(&boot_paca);
256        fixup_boot_paca();
257
258        /* Initialize lockdep early or else spinlocks will blow */
259        lockdep_init();
260
261        /* -------- printk is now safe to use ------- */
262
263        /* Enable early debugging if any specified (see udbg.h) */
264        udbg_early_init();
265
266        DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
267
268        /*
269         * Do early initialization using the flattened device
270         * tree, such as retrieving the physical memory map or
271         * calculating/retrieving the hash table size.
272         */
273        early_init_devtree(__va(dt_ptr));
274
275        epapr_paravirt_early_init();
276
277        /* Now we know the logical id of our boot cpu, setup the paca. */
278        setup_paca(&paca[boot_cpuid]);
279        fixup_boot_paca();
280
281        /* Probe the machine type */
282        probe_machine();
283
284        setup_kdump_trampoline();
285
286        DBG("Found, Initializing memory management...\n");
287
288        /* Initialize the hash table or TLB handling */
289        early_init_mmu();
290
291        /*
292         * At this point, we can let interrupts switch to virtual mode
293         * (the MMU has been setup), so adjust the MSR in the PACA to
294         * have IR and DR set and enable AIL if it exists
295         */
296        cpu_ready_for_interrupts();
297
298        /* Reserve large chunks of memory for use by CMA for KVM */
299        kvm_cma_reserve();
300
301        /*
302         * Reserve any gigantic pages requested on the command line.
303         * memblock needs to have been initialized by the time this is
304         * called since this will reserve memory.
305         */
306        reserve_hugetlb_gpages();
307
308        DBG(" <- early_setup()\n");
309
310#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
311        /*
312         * This needs to be done *last* (after the above DBG() even)
313         *
314         * Right after we return from this function, we turn on the MMU
315         * which means the real-mode access trick that btext does will
316         * no longer work, it needs to switch to using a real MMU
317         * mapping. This call will ensure that it does
318         */
319        btext_map();
320#endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
321}
322
323#ifdef CONFIG_SMP
324void early_setup_secondary(void)
325{
326        /* Mark interrupts enabled in PACA */
327        get_paca()->soft_enabled = 0;
328
329        /* Initialize the hash table or TLB handling */
330        early_init_mmu_secondary();
331
332        /*
333         * At this point, we can let interrupts switch to virtual mode
334         * (the MMU has been setup), so adjust the MSR in the PACA to
335         * have IR and DR set.
336         */
337        cpu_ready_for_interrupts();
338}
339
340#endif /* CONFIG_SMP */
341
342#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
343void smp_release_cpus(void)
344{
345        unsigned long *ptr;
346        int i;
347
348        DBG(" -> smp_release_cpus()\n");
349
350        /* All secondary cpus are spinning on a common spinloop, release them
351         * all now so they can start to spin on their individual paca
352         * spinloops. For non SMP kernels, the secondary cpus never get out
353         * of the common spinloop.
354         */
355
356        ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
357                        - PHYSICAL_START);
358        *ptr = ppc_function_entry(generic_secondary_smp_init);
359
360        /* And wait a bit for them to catch up */
361        for (i = 0; i < 100000; i++) {
362                mb();
363                HMT_low();
364                if (spinning_secondaries == 0)
365                        break;
366                udelay(1);
367        }
368        DBG("spinning_secondaries = %d\n", spinning_secondaries);
369
370        DBG(" <- smp_release_cpus()\n");
371}
372#endif /* CONFIG_SMP || CONFIG_KEXEC */
373
374/*
375 * Initialize some remaining members of the ppc64_caches and systemcfg
376 * structures
377 * (at least until we get rid of them completely). This is mostly some
378 * cache informations about the CPU that will be used by cache flush
379 * routines and/or provided to userland
380 */
381static void __init initialize_cache_info(void)
382{
383        struct device_node *np;
384        unsigned long num_cpus = 0;
385
386        DBG(" -> initialize_cache_info()\n");
387
388        for_each_node_by_type(np, "cpu") {
389                num_cpus += 1;
390
391                /*
392                 * We're assuming *all* of the CPUs have the same
393                 * d-cache and i-cache sizes... -Peter
394                 */
395                if (num_cpus == 1) {
396                        const __be32 *sizep, *lsizep;
397                        u32 size, lsize;
398
399                        size = 0;
400                        lsize = cur_cpu_spec->dcache_bsize;
401                        sizep = of_get_property(np, "d-cache-size", NULL);
402                        if (sizep != NULL)
403                                size = be32_to_cpu(*sizep);
404                        lsizep = of_get_property(np, "d-cache-block-size",
405                                                 NULL);
406                        /* fallback if block size missing */
407                        if (lsizep == NULL)
408                                lsizep = of_get_property(np,
409                                                         "d-cache-line-size",
410                                                         NULL);
411                        if (lsizep != NULL)
412                                lsize = be32_to_cpu(*lsizep);
413                        if (sizep == NULL || lsizep == NULL)
414                                DBG("Argh, can't find dcache properties ! "
415                                    "sizep: %p, lsizep: %p\n", sizep, lsizep);
416
417                        ppc64_caches.dsize = size;
418                        ppc64_caches.dline_size = lsize;
419                        ppc64_caches.log_dline_size = __ilog2(lsize);
420                        ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
421
422                        size = 0;
423                        lsize = cur_cpu_spec->icache_bsize;
424                        sizep = of_get_property(np, "i-cache-size", NULL);
425                        if (sizep != NULL)
426                                size = be32_to_cpu(*sizep);
427                        lsizep = of_get_property(np, "i-cache-block-size",
428                                                 NULL);
429                        if (lsizep == NULL)
430                                lsizep = of_get_property(np,
431                                                         "i-cache-line-size",
432                                                         NULL);
433                        if (lsizep != NULL)
434                                lsize = be32_to_cpu(*lsizep);
435                        if (sizep == NULL || lsizep == NULL)
436                                DBG("Argh, can't find icache properties ! "
437                                    "sizep: %p, lsizep: %p\n", sizep, lsizep);
438
439                        ppc64_caches.isize = size;
440                        ppc64_caches.iline_size = lsize;
441                        ppc64_caches.log_iline_size = __ilog2(lsize);
442                        ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
443                }
444        }
445
446        DBG(" <- initialize_cache_info()\n");
447}
448
449
450/*
451 * Do some initial setup of the system.  The parameters are those which
452 * were passed in from the bootloader.
453 */
454void __init setup_system(void)
455{
456        DBG(" -> setup_system()\n");
457
458        /* Apply the CPUs-specific and firmware specific fixups to kernel
459         * text (nop out sections not relevant to this CPU or this firmware)
460         */
461        do_feature_fixups(cur_cpu_spec->cpu_features,
462                          &__start___ftr_fixup, &__stop___ftr_fixup);
463        do_feature_fixups(cur_cpu_spec->mmu_features,
464                          &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
465        do_feature_fixups(powerpc_firmware_features,
466                          &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
467        do_lwsync_fixups(cur_cpu_spec->cpu_features,
468                         &__start___lwsync_fixup, &__stop___lwsync_fixup);
469        do_final_fixups();
470
471        /*
472         * Unflatten the device-tree passed by prom_init or kexec
473         */
474        unflatten_device_tree();
475
476        /*
477         * Fill the ppc64_caches & systemcfg structures with informations
478         * retrieved from the device-tree.
479         */
480        initialize_cache_info();
481
482#ifdef CONFIG_PPC_RTAS
483        /*
484         * Initialize RTAS if available
485         */
486        rtas_initialize();
487#endif /* CONFIG_PPC_RTAS */
488
489        /*
490         * Check if we have an initrd provided via the device-tree
491         */
492        check_for_initrd();
493
494        /*
495         * Do some platform specific early initializations, that includes
496         * setting up the hash table pointers. It also sets up some interrupt-mapping
497         * related options that will be used by finish_device_tree()
498         */
499        if (ppc_md.init_early)
500                ppc_md.init_early();
501
502        /*
503         * We can discover serial ports now since the above did setup the
504         * hash table management for us, thus ioremap works. We do that early
505         * so that further code can be debugged
506         */
507        find_legacy_serial_ports();
508
509        /*
510         * Register early console
511         */
512        register_early_udbg_console();
513
514        /*
515         * Initialize xmon
516         */
517        xmon_setup();
518
519        smp_setup_cpu_maps();
520        check_smt_enabled();
521        setup_tlb_core_data();
522
523        /*
524         * Freescale Book3e parts spin in a loop provided by firmware,
525         * so smp_release_cpus() does nothing for them
526         */
527#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_FSL_BOOK3E)
528        /* Release secondary cpus out of their spinloops at 0x60 now that
529         * we can map physical -> logical CPU ids
530         */
531        smp_release_cpus();
532#endif
533
534        pr_info("Starting Linux PPC64 %s\n", init_utsname()->version);
535
536        pr_info("-----------------------------------------------------\n");
537        pr_info("ppc64_pft_size    = 0x%llx\n", ppc64_pft_size);
538        pr_info("phys_mem_size     = 0x%llx\n", memblock_phys_mem_size());
539
540        if (ppc64_caches.dline_size != 0x80)
541                pr_info("dcache_line_size  = 0x%x\n", ppc64_caches.dline_size);
542        if (ppc64_caches.iline_size != 0x80)
543                pr_info("icache_line_size  = 0x%x\n", ppc64_caches.iline_size);
544
545        pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
546        pr_info("  possible        = 0x%016lx\n", CPU_FTRS_POSSIBLE);
547        pr_info("  always          = 0x%016lx\n", CPU_FTRS_ALWAYS);
548        pr_info("cpu_user_features = 0x%08x 0x%08x\n", cur_cpu_spec->cpu_user_features,
549                cur_cpu_spec->cpu_user_features2);
550        pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
551        pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
552
553#ifdef CONFIG_PPC_STD_MMU_64
554        if (htab_address)
555                pr_info("htab_address      = 0x%p\n", htab_address);
556
557        pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
558#endif
559
560        if (PHYSICAL_START > 0)
561                pr_info("physical_start    = 0x%llx\n",
562                       (unsigned long long)PHYSICAL_START);
563        pr_info("-----------------------------------------------------\n");
564
565        DBG(" <- setup_system()\n");
566}
567
568/* This returns the limit below which memory accesses to the linear
569 * mapping are guarnateed not to cause a TLB or SLB miss. This is
570 * used to allocate interrupt or emergency stacks for which our
571 * exception entry path doesn't deal with being interrupted.
572 */
573static u64 safe_stack_limit(void)
574{
575#ifdef CONFIG_PPC_BOOK3E
576        /* Freescale BookE bolts the entire linear mapping */
577        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E))
578                return linear_map_top;
579        /* Other BookE, we assume the first GB is bolted */
580        return 1ul << 30;
581#else
582        /* BookS, the first segment is bolted */
583        if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
584                return 1UL << SID_SHIFT_1T;
585        return 1UL << SID_SHIFT;
586#endif
587}
588
589static void __init irqstack_early_init(void)
590{
591        u64 limit = safe_stack_limit();
592        unsigned int i;
593
594        /*
595         * Interrupt stacks must be in the first segment since we
596         * cannot afford to take SLB misses on them.
597         */
598        for_each_possible_cpu(i) {
599                softirq_ctx[i] = (struct thread_info *)
600                        __va(memblock_alloc_base(THREAD_SIZE,
601                                            THREAD_SIZE, limit));
602                hardirq_ctx[i] = (struct thread_info *)
603                        __va(memblock_alloc_base(THREAD_SIZE,
604                                            THREAD_SIZE, limit));
605        }
606}
607
608#ifdef CONFIG_PPC_BOOK3E
609static void __init exc_lvl_early_init(void)
610{
611        unsigned int i;
612        unsigned long sp;
613
614        for_each_possible_cpu(i) {
615                sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
616                critirq_ctx[i] = (struct thread_info *)__va(sp);
617                paca[i].crit_kstack = __va(sp + THREAD_SIZE);
618
619                sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
620                dbgirq_ctx[i] = (struct thread_info *)__va(sp);
621                paca[i].dbg_kstack = __va(sp + THREAD_SIZE);
622
623                sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE);
624                mcheckirq_ctx[i] = (struct thread_info *)__va(sp);
625                paca[i].mc_kstack = __va(sp + THREAD_SIZE);
626        }
627
628        if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
629                patch_exception(0x040, exc_debug_debug_book3e);
630}
631#else
632#define exc_lvl_early_init()
633#endif
634
635/*
636 * Stack space used when we detect a bad kernel stack pointer, and
637 * early in SMP boots before relocation is enabled. Exclusive emergency
638 * stack for machine checks.
639 */
640static void __init emergency_stack_init(void)
641{
642        u64 limit;
643        unsigned int i;
644
645        /*
646         * Emergency stacks must be under 256MB, we cannot afford to take
647         * SLB misses on them. The ABI also requires them to be 128-byte
648         * aligned.
649         *
650         * Since we use these as temporary stacks during secondary CPU
651         * bringup, we need to get at them in real mode. This means they
652         * must also be within the RMO region.
653         */
654        limit = min(safe_stack_limit(), ppc64_rma_size);
655
656        for_each_possible_cpu(i) {
657                unsigned long sp;
658                sp  = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
659                sp += THREAD_SIZE;
660                paca[i].emergency_sp = __va(sp);
661
662#ifdef CONFIG_PPC_BOOK3S_64
663                /* emergency stack for machine check exception handling. */
664                sp  = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
665                sp += THREAD_SIZE;
666                paca[i].mc_emergency_sp = __va(sp);
667#endif
668        }
669}
670
671/*
672 * Called into from start_kernel this initializes bootmem, which is used
673 * to manage page allocation until mem_init is called.
674 */
675void __init setup_arch(char **cmdline_p)
676{
677        ppc64_boot_msg(0x12, "Setup Arch");
678
679        *cmdline_p = boot_command_line;
680
681        /*
682         * Set cache line size based on type of cpu as a default.
683         * Systems with OF can look in the properties on the cpu node(s)
684         * for a possibly more accurate value.
685         */
686        dcache_bsize = ppc64_caches.dline_size;
687        icache_bsize = ppc64_caches.iline_size;
688
689        if (ppc_md.panic)
690                setup_panic();
691
692        init_mm.start_code = (unsigned long)_stext;
693        init_mm.end_code = (unsigned long) _etext;
694        init_mm.end_data = (unsigned long) _edata;
695        init_mm.brk = klimit;
696#ifdef CONFIG_PPC_64K_PAGES
697        init_mm.context.pte_frag = NULL;
698#endif
699        irqstack_early_init();
700        exc_lvl_early_init();
701        emergency_stack_init();
702
703        /* set up the bootmem stuff with available memory */
704        do_init_bootmem();
705        sparse_init();
706
707#ifdef CONFIG_DUMMY_CONSOLE
708        conswitchp = &dummy_con;
709#endif
710
711        if (ppc_md.setup_arch)
712                ppc_md.setup_arch();
713
714        paging_init();
715
716        /* Initialize the MMU context management stuff */
717        mmu_context_init();
718
719        /* Interrupt code needs to be 64K-aligned */
720        if ((unsigned long)_stext & 0xffff)
721                panic("Kernelbase not 64K-aligned (0x%lx)!\n",
722                      (unsigned long)_stext);
723
724        ppc64_boot_msg(0x15, "Setup Done");
725}
726
727
728/* ToDo: do something useful if ppc_md is not yet setup. */
729#define PPC64_LINUX_FUNCTION 0x0f000000
730#define PPC64_IPL_MESSAGE 0xc0000000
731#define PPC64_TERM_MESSAGE 0xb0000000
732
733static void ppc64_do_msg(unsigned int src, const char *msg)
734{
735        if (ppc_md.progress) {
736                char buf[128];
737
738                sprintf(buf, "%08X\n", src);
739                ppc_md.progress(buf, 0);
740                snprintf(buf, 128, "%s", msg);
741                ppc_md.progress(buf, 0);
742        }
743}
744
745/* Print a boot progress message. */
746void ppc64_boot_msg(unsigned int src, const char *msg)
747{
748        ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
749        printk("[boot]%04x %s\n", src, msg);
750}
751
752#ifdef CONFIG_SMP
753#define PCPU_DYN_SIZE           ()
754
755static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
756{
757        return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
758                                    __pa(MAX_DMA_ADDRESS));
759}
760
761static void __init pcpu_fc_free(void *ptr, size_t size)
762{
763        free_bootmem(__pa(ptr), size);
764}
765
766static int pcpu_cpu_distance(unsigned int from, unsigned int to)
767{
768        if (cpu_to_node(from) == cpu_to_node(to))
769                return LOCAL_DISTANCE;
770        else
771                return REMOTE_DISTANCE;
772}
773
774unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
775EXPORT_SYMBOL(__per_cpu_offset);
776
777void __init setup_per_cpu_areas(void)
778{
779        const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
780        size_t atom_size;
781        unsigned long delta;
782        unsigned int cpu;
783        int rc;
784
785        /*
786         * Linear mapping is one of 4K, 1M and 16M.  For 4K, no need
787         * to group units.  For larger mappings, use 1M atom which
788         * should be large enough to contain a number of units.
789         */
790        if (mmu_linear_psize == MMU_PAGE_4K)
791                atom_size = PAGE_SIZE;
792        else
793                atom_size = 1 << 20;
794
795        rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
796                                    pcpu_fc_alloc, pcpu_fc_free);
797        if (rc < 0)
798                panic("cannot initialize percpu area (err=%d)", rc);
799
800        delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
801        for_each_possible_cpu(cpu) {
802                __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
803                paca[cpu].data_offset = __per_cpu_offset[cpu];
804        }
805}
806#endif
807
808#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
809unsigned long memory_block_size_bytes(void)
810{
811        if (ppc_md.memory_block_size)
812                return ppc_md.memory_block_size();
813
814        return MIN_MEMORY_BLOCK_SIZE;
815}
816#endif
817
818#if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)
819struct ppc_pci_io ppc_pci_io;
820EXPORT_SYMBOL(ppc_pci_io);
821#endif
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