source: src/linux/universal/linux-3.18/drivers/net/ethernet/smsc/smc91x.c @ 31869

Last change on this file since 31869 was 31869, checked in by brainslayer, 4 months ago

update

File size: 63.4 KB
Line 
1/*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 *      Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 *      Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see <http://www.gnu.org/licenses/>.
23 *
24 * Arguments:
25 *      io      = for the base address
26 *      irq     = for the IRQ
27 *      nowait  = 0 for normal wait states, 1 eliminates additional wait states
28 *
29 * original author:
30 *      Erik Stahlman <erik@vt.edu>
31 *
32 * hardware multicast code:
33 *    Peter Cammaert <pc@denkart.be>
34 *
35 * contributors:
36 *      Daris A Nevil <dnevil@snmc.com>
37 *      Nicolas Pitre <nico@fluxnic.net>
38 *      Russell King <rmk@arm.linux.org.uk>
39 *
40 * History:
41 *   08/20/00  Arnaldo Melo       fix kfree(skb) in smc_hardware_send_packet
42 *   12/15/00  Christian Jullien  fix "Warning: kfree_skb on hard IRQ"
43 *   03/16/01  Daris A Nevil      modified smc9194.c for use with LAN91C111
44 *   08/22/01  Scott Anderson     merge changes from smc9194 to smc91111
45 *   08/21/01  Pramod B Bhardwaj  added support for RevB of LAN91C111
46 *   12/20/01  Jeff Sutherland    initial port to Xscale PXA with DMA support
47 *   04/07/03  Nicolas Pitre      unified SMC91x driver, killed irq races,
48 *                                more bus abstraction, big cleanup, etc.
49 *   29/09/03  Russell King       - add driver model support
50 *                                - ethtool support
51 *                                - convert to use generic MII interface
52 *                                - add link up/down notification
53 *                                - don't try to handle full negotiation in
54 *                                  smc_phy_configure
55 *                                - clean up (and fix stack overrun) in PHY
56 *                                  MII read/write functions
57 *   22/09/04  Nicolas Pitre      big update (see commit log for details)
58 */
59static const char version[] =
60        "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>";
61
62/* Debugging level */
63#ifndef SMC_DEBUG
64#define SMC_DEBUG               0
65#endif
66
67
68#include <linux/module.h>
69#include <linux/kernel.h>
70#include <linux/sched.h>
71#include <linux/delay.h>
72#include <linux/interrupt.h>
73#include <linux/irq.h>
74#include <linux/errno.h>
75#include <linux/ioport.h>
76#include <linux/crc32.h>
77#include <linux/platform_device.h>
78#include <linux/spinlock.h>
79#include <linux/ethtool.h>
80#include <linux/mii.h>
81#include <linux/workqueue.h>
82#include <linux/of.h>
83#include <linux/of_device.h>
84#include <linux/of_gpio.h>
85
86#include <linux/netdevice.h>
87#include <linux/etherdevice.h>
88#include <linux/skbuff.h>
89
90#include <asm/io.h>
91
92#include "smc91x.h"
93
94#ifndef SMC_NOWAIT
95# define SMC_NOWAIT             0
96#endif
97static int nowait = SMC_NOWAIT;
98module_param(nowait, int, 0400);
99MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
100
101/*
102 * Transmit timeout, default 5 seconds.
103 */
104static int watchdog = 1000;
105module_param(watchdog, int, 0400);
106MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
107
108MODULE_LICENSE("GPL");
109MODULE_ALIAS("platform:smc91x");
110
111/*
112 * The internal workings of the driver.  If you are changing anything
113 * here with the SMC stuff, you should have the datasheet and know
114 * what you are doing.
115 */
116#define CARDNAME "smc91x"
117
118/*
119 * Use power-down feature of the chip
120 */
121#define POWER_DOWN              1
122
123/*
124 * Wait time for memory to be free.  This probably shouldn't be
125 * tuned that much, as waiting for this means nothing else happens
126 * in the system
127 */
128#define MEMORY_WAIT_TIME        16
129
130/*
131 * The maximum number of processing loops allowed for each call to the
132 * IRQ handler.
133 */
134#define MAX_IRQ_LOOPS           8
135
136/*
137 * This selects whether TX packets are sent one by one to the SMC91x internal
138 * memory and throttled until transmission completes.  This may prevent
139 * RX overruns a litle by keeping much of the memory free for RX packets
140 * but to the expense of reduced TX throughput and increased IRQ overhead.
141 * Note this is not a cure for a too slow data bus or too high IRQ latency.
142 */
143#define THROTTLE_TX_PKTS        0
144
145/*
146 * The MII clock high/low times.  2x this number gives the MII clock period
147 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
148 */
149#define MII_DELAY               1
150
151#define DBG(n, dev, fmt, ...)                                   \
152        do {                                                    \
153                if (SMC_DEBUG >= (n))                           \
154                        netdev_dbg(dev, fmt, ##__VA_ARGS__);    \
155        } while (0)
156
157#define PRINTK(dev, fmt, ...)                                   \
158        do {                                                    \
159                if (SMC_DEBUG > 0)                              \
160                        netdev_info(dev, fmt, ##__VA_ARGS__);   \
161                else                                            \
162                        netdev_dbg(dev, fmt, ##__VA_ARGS__);    \
163        } while (0)
164
165#if SMC_DEBUG > 3
166static void PRINT_PKT(u_char *buf, int length)
167{
168        int i;
169        int remainder;
170        int lines;
171
172        lines = length / 16;
173        remainder = length % 16;
174
175        for (i = 0; i < lines ; i ++) {
176                int cur;
177                printk(KERN_DEBUG);
178                for (cur = 0; cur < 8; cur++) {
179                        u_char a, b;
180                        a = *buf++;
181                        b = *buf++;
182                        pr_cont("%02x%02x ", a, b);
183                }
184                pr_cont("\n");
185        }
186        printk(KERN_DEBUG);
187        for (i = 0; i < remainder/2 ; i++) {
188                u_char a, b;
189                a = *buf++;
190                b = *buf++;
191                pr_cont("%02x%02x ", a, b);
192        }
193        pr_cont("\n");
194}
195#else
196static inline void PRINT_PKT(u_char *buf, int length) { }
197#endif
198
199
200/* this enables an interrupt in the interrupt mask register */
201#define SMC_ENABLE_INT(lp, x) do {                                      \
202        unsigned char mask;                                             \
203        unsigned long smc_enable_flags;                                 \
204        spin_lock_irqsave(&lp->lock, smc_enable_flags);                 \
205        mask = SMC_GET_INT_MASK(lp);                                    \
206        mask |= (x);                                                    \
207        SMC_SET_INT_MASK(lp, mask);                                     \
208        spin_unlock_irqrestore(&lp->lock, smc_enable_flags);            \
209} while (0)
210
211/* this disables an interrupt from the interrupt mask register */
212#define SMC_DISABLE_INT(lp, x) do {                                     \
213        unsigned char mask;                                             \
214        unsigned long smc_disable_flags;                                \
215        spin_lock_irqsave(&lp->lock, smc_disable_flags);                \
216        mask = SMC_GET_INT_MASK(lp);                                    \
217        mask &= ~(x);                                                   \
218        SMC_SET_INT_MASK(lp, mask);                                     \
219        spin_unlock_irqrestore(&lp->lock, smc_disable_flags);           \
220} while (0)
221
222/*
223 * Wait while MMU is busy.  This is usually in the order of a few nanosecs
224 * if at all, but let's avoid deadlocking the system if the hardware
225 * decides to go south.
226 */
227#define SMC_WAIT_MMU_BUSY(lp) do {                                      \
228        if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) {          \
229                unsigned long timeout = jiffies + 2;                    \
230                while (SMC_GET_MMU_CMD(lp) & MC_BUSY) {         \
231                        if (time_after(jiffies, timeout)) {             \
232                                netdev_dbg(dev, "timeout %s line %d\n", \
233                                           __FILE__, __LINE__);         \
234                                break;                                  \
235                        }                                               \
236                        cpu_relax();                                    \
237                }                                                       \
238        }                                                               \
239} while (0)
240
241
242/*
243 * this does a soft reset on the device
244 */
245static void smc_reset(struct net_device *dev)
246{
247        struct smc_local *lp = netdev_priv(dev);
248        void __iomem *ioaddr = lp->base;
249        unsigned int ctl, cfg;
250        struct sk_buff *pending_skb;
251
252        DBG(2, dev, "%s\n", __func__);
253
254        /* Disable all interrupts, block TX tasklet */
255        spin_lock_irq(&lp->lock);
256        SMC_SELECT_BANK(lp, 2);
257        SMC_SET_INT_MASK(lp, 0);
258        pending_skb = lp->pending_tx_skb;
259        lp->pending_tx_skb = NULL;
260        spin_unlock_irq(&lp->lock);
261
262        /* free any pending tx skb */
263        if (pending_skb) {
264                dev_kfree_skb(pending_skb);
265                dev->stats.tx_errors++;
266                dev->stats.tx_aborted_errors++;
267        }
268
269        /*
270         * This resets the registers mostly to defaults, but doesn't
271         * affect EEPROM.  That seems unnecessary
272         */
273        SMC_SELECT_BANK(lp, 0);
274        SMC_SET_RCR(lp, RCR_SOFTRST);
275
276        /*
277         * Setup the Configuration Register
278         * This is necessary because the CONFIG_REG is not affected
279         * by a soft reset
280         */
281        SMC_SELECT_BANK(lp, 1);
282
283        cfg = CONFIG_DEFAULT;
284
285        /*
286         * Setup for fast accesses if requested.  If the card/system
287         * can't handle it then there will be no recovery except for
288         * a hard reset or power cycle
289         */
290        if (lp->cfg.flags & SMC91X_NOWAIT)
291                cfg |= CONFIG_NO_WAIT;
292
293        /*
294         * Release from possible power-down state
295         * Configuration register is not affected by Soft Reset
296         */
297        cfg |= CONFIG_EPH_POWER_EN;
298
299        SMC_SET_CONFIG(lp, cfg);
300
301        /* this should pause enough for the chip to be happy */
302        /*
303         * elaborate?  What does the chip _need_? --jgarzik
304         *
305         * This seems to be undocumented, but something the original
306         * driver(s) have always done.  Suspect undocumented timing
307         * info/determined empirically. --rmk
308         */
309        udelay(1);
310
311        /* Disable transmit and receive functionality */
312        SMC_SELECT_BANK(lp, 0);
313        SMC_SET_RCR(lp, RCR_CLEAR);
314        SMC_SET_TCR(lp, TCR_CLEAR);
315
316        SMC_SELECT_BANK(lp, 1);
317        ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
318
319        /*
320         * Set the control register to automatically release successfully
321         * transmitted packets, to make the best use out of our limited
322         * memory
323         */
324        if(!THROTTLE_TX_PKTS)
325                ctl |= CTL_AUTO_RELEASE;
326        else
327                ctl &= ~CTL_AUTO_RELEASE;
328        SMC_SET_CTL(lp, ctl);
329
330        /* Reset the MMU */
331        SMC_SELECT_BANK(lp, 2);
332        SMC_SET_MMU_CMD(lp, MC_RESET);
333        SMC_WAIT_MMU_BUSY(lp);
334}
335
336/*
337 * Enable Interrupts, Receive, and Transmit
338 */
339static void smc_enable(struct net_device *dev)
340{
341        struct smc_local *lp = netdev_priv(dev);
342        void __iomem *ioaddr = lp->base;
343        int mask;
344
345        DBG(2, dev, "%s\n", __func__);
346
347        /* see the header file for options in TCR/RCR DEFAULT */
348        SMC_SELECT_BANK(lp, 0);
349        SMC_SET_TCR(lp, lp->tcr_cur_mode);
350        SMC_SET_RCR(lp, lp->rcr_cur_mode);
351
352        SMC_SELECT_BANK(lp, 1);
353        SMC_SET_MAC_ADDR(lp, dev->dev_addr);
354
355        /* now, enable interrupts */
356        mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
357        if (lp->version >= (CHIP_91100 << 4))
358                mask |= IM_MDINT;
359        SMC_SELECT_BANK(lp, 2);
360        SMC_SET_INT_MASK(lp, mask);
361
362        /*
363         * From this point the register bank must _NOT_ be switched away
364         * to something else than bank 2 without proper locking against
365         * races with any tasklet or interrupt handlers until smc_shutdown()
366         * or smc_reset() is called.
367         */
368}
369
370/*
371 * this puts the device in an inactive state
372 */
373static void smc_shutdown(struct net_device *dev)
374{
375        struct smc_local *lp = netdev_priv(dev);
376        void __iomem *ioaddr = lp->base;
377        struct sk_buff *pending_skb;
378
379        DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
380
381        /* no more interrupts for me */
382        spin_lock_irq(&lp->lock);
383        SMC_SELECT_BANK(lp, 2);
384        SMC_SET_INT_MASK(lp, 0);
385        pending_skb = lp->pending_tx_skb;
386        lp->pending_tx_skb = NULL;
387        spin_unlock_irq(&lp->lock);
388        if (pending_skb)
389                dev_kfree_skb(pending_skb);
390
391        /* and tell the card to stay away from that nasty outside world */
392        SMC_SELECT_BANK(lp, 0);
393        SMC_SET_RCR(lp, RCR_CLEAR);
394        SMC_SET_TCR(lp, TCR_CLEAR);
395
396#ifdef POWER_DOWN
397        /* finally, shut the chip down */
398        SMC_SELECT_BANK(lp, 1);
399        SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
400#endif
401}
402
403/*
404 * This is the procedure to handle the receipt of a packet.
405 */
406static inline void  smc_rcv(struct net_device *dev)
407{
408        struct smc_local *lp = netdev_priv(dev);
409        void __iomem *ioaddr = lp->base;
410        unsigned int packet_number, status, packet_len;
411
412        DBG(3, dev, "%s\n", __func__);
413
414        packet_number = SMC_GET_RXFIFO(lp);
415        if (unlikely(packet_number & RXFIFO_REMPTY)) {
416                PRINTK(dev, "smc_rcv with nothing on FIFO.\n");
417                return;
418        }
419
420        /* read from start of packet */
421        SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
422
423        /* First two words are status and packet length */
424        SMC_GET_PKT_HDR(lp, status, packet_len);
425        packet_len &= 0x07ff;  /* mask off top bits */
426        DBG(2, dev, "RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
427            packet_number, status, packet_len, packet_len);
428
429        back:
430        if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
431                if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
432                        /* accept VLAN packets */
433                        status &= ~RS_TOOLONG;
434                        goto back;
435                }
436                if (packet_len < 6) {
437                        /* bloody hardware */
438                        netdev_err(dev, "fubar (rxlen %u status %x\n",
439                                   packet_len, status);
440                        status |= RS_TOOSHORT;
441                }
442                SMC_WAIT_MMU_BUSY(lp);
443                SMC_SET_MMU_CMD(lp, MC_RELEASE);
444                dev->stats.rx_errors++;
445                if (status & RS_ALGNERR)
446                        dev->stats.rx_frame_errors++;
447                if (status & (RS_TOOSHORT | RS_TOOLONG))
448                        dev->stats.rx_length_errors++;
449                if (status & RS_BADCRC)
450                        dev->stats.rx_crc_errors++;
451        } else {
452                struct sk_buff *skb;
453                unsigned char *data;
454                unsigned int data_len;
455
456                /* set multicast stats */
457                if (status & RS_MULTICAST)
458                        dev->stats.multicast++;
459
460                /*
461                 * Actual payload is packet_len - 6 (or 5 if odd byte).
462                 * We want skb_reserve(2) and the final ctrl word
463                 * (2 bytes, possibly containing the payload odd byte).
464                 * Furthermore, we add 2 bytes to allow rounding up to
465                 * multiple of 4 bytes on 32 bit buses.
466                 * Hence packet_len - 6 + 2 + 2 + 2.
467                 */
468                skb = netdev_alloc_skb(dev, packet_len);
469                if (unlikely(skb == NULL)) {
470                        SMC_WAIT_MMU_BUSY(lp);
471                        SMC_SET_MMU_CMD(lp, MC_RELEASE);
472                        dev->stats.rx_dropped++;
473                        return;
474                }
475
476                /* Align IP header to 32 bits */
477                skb_reserve(skb, 2);
478
479                /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
480                if (lp->version == 0x90)
481                        status |= RS_ODDFRAME;
482
483                /*
484                 * If odd length: packet_len - 5,
485                 * otherwise packet_len - 6.
486                 * With the trailing ctrl byte it's packet_len - 4.
487                 */
488                data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
489                data = skb_put(skb, data_len);
490                SMC_PULL_DATA(lp, data, packet_len - 4);
491
492                SMC_WAIT_MMU_BUSY(lp);
493                SMC_SET_MMU_CMD(lp, MC_RELEASE);
494
495                PRINT_PKT(data, packet_len - 4);
496
497                skb->protocol = eth_type_trans(skb, dev);
498                netif_rx(skb);
499                dev->stats.rx_packets++;
500                dev->stats.rx_bytes += data_len;
501        }
502}
503
504#ifdef CONFIG_SMP
505/*
506 * On SMP we have the following problem:
507 *
508 *      A = smc_hardware_send_pkt()
509 *      B = smc_hard_start_xmit()
510 *      C = smc_interrupt()
511 *
512 * A and B can never be executed simultaneously.  However, at least on UP,
513 * it is possible (and even desirable) for C to interrupt execution of
514 * A or B in order to have better RX reliability and avoid overruns.
515 * C, just like A and B, must have exclusive access to the chip and
516 * each of them must lock against any other concurrent access.
517 * Unfortunately this is not possible to have C suspend execution of A or
518 * B taking place on another CPU. On UP this is no an issue since A and B
519 * are run from softirq context and C from hard IRQ context, and there is
520 * no other CPU where concurrent access can happen.
521 * If ever there is a way to force at least B and C to always be executed
522 * on the same CPU then we could use read/write locks to protect against
523 * any other concurrent access and C would always interrupt B. But life
524 * isn't that easy in a SMP world...
525 */
526#define smc_special_trylock(lock, flags)                                \
527({                                                                      \
528        int __ret;                                                      \
529        local_irq_save(flags);                                          \
530        __ret = spin_trylock(lock);                                     \
531        if (!__ret)                                                     \
532                local_irq_restore(flags);                               \
533        __ret;                                                          \
534})
535#define smc_special_lock(lock, flags)           spin_lock_irqsave(lock, flags)
536#define smc_special_unlock(lock, flags)         spin_unlock_irqrestore(lock, flags)
537#else
538#define smc_special_trylock(lock, flags)        ((void)flags, true)
539#define smc_special_lock(lock, flags)           do { flags = 0; } while (0)
540#define smc_special_unlock(lock, flags) do { flags = 0; } while (0)
541#endif
542
543/*
544 * This is called to actually send a packet to the chip.
545 */
546static void smc_hardware_send_pkt(unsigned long data)
547{
548        struct net_device *dev = (struct net_device *)data;
549        struct smc_local *lp = netdev_priv(dev);
550        void __iomem *ioaddr = lp->base;
551        struct sk_buff *skb;
552        unsigned int packet_no, len;
553        unsigned char *buf;
554        unsigned long flags;
555
556        DBG(3, dev, "%s\n", __func__);
557
558        if (!smc_special_trylock(&lp->lock, flags)) {
559                netif_stop_queue(dev);
560                tasklet_schedule(&lp->tx_task);
561                return;
562        }
563
564        skb = lp->pending_tx_skb;
565        if (unlikely(!skb)) {
566                smc_special_unlock(&lp->lock, flags);
567                return;
568        }
569        lp->pending_tx_skb = NULL;
570
571        packet_no = SMC_GET_AR(lp);
572        if (unlikely(packet_no & AR_FAILED)) {
573                netdev_err(dev, "Memory allocation failed.\n");
574                dev->stats.tx_errors++;
575                dev->stats.tx_fifo_errors++;
576                smc_special_unlock(&lp->lock, flags);
577                goto done;
578        }
579
580        /* point to the beginning of the packet */
581        SMC_SET_PN(lp, packet_no);
582        SMC_SET_PTR(lp, PTR_AUTOINC);
583
584        buf = skb->data;
585        len = skb->len;
586        DBG(2, dev, "TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
587            packet_no, len, len, buf);
588        PRINT_PKT(buf, len);
589
590        /*
591         * Send the packet length (+6 for status words, length, and ctl.
592         * The card will pad to 64 bytes with zeroes if packet is too small.
593         */
594        SMC_PUT_PKT_HDR(lp, 0, len + 6);
595
596        /* send the actual data */
597        SMC_PUSH_DATA(lp, buf, len & ~1);
598
599        /* Send final ctl word with the last byte if there is one */
600        SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
601
602        /*
603         * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
604         * have the effect of having at most one packet queued for TX
605         * in the chip's memory at all time.
606         *
607         * If THROTTLE_TX_PKTS is not set then the queue is stopped only
608         * when memory allocation (MC_ALLOC) does not succeed right away.
609         */
610        if (THROTTLE_TX_PKTS)
611                netif_stop_queue(dev);
612
613        /* queue the packet for TX */
614        SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
615        smc_special_unlock(&lp->lock, flags);
616
617        dev->trans_start = jiffies;
618        dev->stats.tx_packets++;
619        dev->stats.tx_bytes += len;
620
621        SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
622
623done:   if (!THROTTLE_TX_PKTS)
624                netif_wake_queue(dev);
625
626        dev_consume_skb_any(skb);
627}
628
629/*
630 * Since I am not sure if I will have enough room in the chip's ram
631 * to store the packet, I call this routine which either sends it
632 * now, or set the card to generates an interrupt when ready
633 * for the packet.
634 */
635static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
636{
637        struct smc_local *lp = netdev_priv(dev);
638        void __iomem *ioaddr = lp->base;
639        unsigned int numPages, poll_count, status;
640        unsigned long flags;
641
642        DBG(3, dev, "%s\n", __func__);
643
644        BUG_ON(lp->pending_tx_skb != NULL);
645
646        /*
647         * The MMU wants the number of pages to be the number of 256 bytes
648         * 'pages', minus 1 (since a packet can't ever have 0 pages :))
649         *
650         * The 91C111 ignores the size bits, but earlier models don't.
651         *
652         * Pkt size for allocating is data length +6 (for additional status
653         * words, length and ctl)
654         *
655         * If odd size then last byte is included in ctl word.
656         */
657        numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
658        if (unlikely(numPages > 7)) {
659                netdev_warn(dev, "Far too big packet error.\n");
660                dev->stats.tx_errors++;
661                dev->stats.tx_dropped++;
662                dev_kfree_skb_any(skb);
663                return NETDEV_TX_OK;
664        }
665
666        smc_special_lock(&lp->lock, flags);
667
668        /* now, try to allocate the memory */
669        SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
670
671        /*
672         * Poll the chip for a short amount of time in case the
673         * allocation succeeds quickly.
674         */
675        poll_count = MEMORY_WAIT_TIME;
676        do {
677                status = SMC_GET_INT(lp);
678                if (status & IM_ALLOC_INT) {
679                        SMC_ACK_INT(lp, IM_ALLOC_INT);
680                        break;
681                }
682        } while (--poll_count);
683
684        smc_special_unlock(&lp->lock, flags);
685
686        lp->pending_tx_skb = skb;
687        if (!poll_count) {
688                /* oh well, wait until the chip finds memory later */
689                netif_stop_queue(dev);
690                DBG(2, dev, "TX memory allocation deferred.\n");
691                SMC_ENABLE_INT(lp, IM_ALLOC_INT);
692        } else {
693                /*
694                 * Allocation succeeded: push packet to the chip's own memory
695                 * immediately.
696                 */
697                smc_hardware_send_pkt((unsigned long)dev);
698        }
699
700        return NETDEV_TX_OK;
701}
702
703/*
704 * This handles a TX interrupt, which is only called when:
705 * - a TX error occurred, or
706 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
707 */
708static void smc_tx(struct net_device *dev)
709{
710        struct smc_local *lp = netdev_priv(dev);
711        void __iomem *ioaddr = lp->base;
712        unsigned int saved_packet, packet_no, tx_status, pkt_len;
713
714        DBG(3, dev, "%s\n", __func__);
715
716        /* If the TX FIFO is empty then nothing to do */
717        packet_no = SMC_GET_TXFIFO(lp);
718        if (unlikely(packet_no & TXFIFO_TEMPTY)) {
719                PRINTK(dev, "smc_tx with nothing on FIFO.\n");
720                return;
721        }
722
723        /* select packet to read from */
724        saved_packet = SMC_GET_PN(lp);
725        SMC_SET_PN(lp, packet_no);
726
727        /* read the first word (status word) from this packet */
728        SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
729        SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
730        DBG(2, dev, "TX STATUS 0x%04x PNR 0x%02x\n",
731            tx_status, packet_no);
732
733        if (!(tx_status & ES_TX_SUC))
734                dev->stats.tx_errors++;
735
736        if (tx_status & ES_LOSTCARR)
737                dev->stats.tx_carrier_errors++;
738
739        if (tx_status & (ES_LATCOL | ES_16COL)) {
740                PRINTK(dev, "%s occurred on last xmit\n",
741                       (tx_status & ES_LATCOL) ?
742                        "late collision" : "too many collisions");
743                dev->stats.tx_window_errors++;
744                if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
745                        netdev_info(dev, "unexpectedly large number of bad collisions. Please check duplex setting.\n");
746                }
747        }
748
749        /* kill the packet */
750        SMC_WAIT_MMU_BUSY(lp);
751        SMC_SET_MMU_CMD(lp, MC_FREEPKT);
752
753        /* Don't restore Packet Number Reg until busy bit is cleared */
754        SMC_WAIT_MMU_BUSY(lp);
755        SMC_SET_PN(lp, saved_packet);
756
757        /* re-enable transmit */
758        SMC_SELECT_BANK(lp, 0);
759        SMC_SET_TCR(lp, lp->tcr_cur_mode);
760        SMC_SELECT_BANK(lp, 2);
761}
762
763
764/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
765
766static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
767{
768        struct smc_local *lp = netdev_priv(dev);
769        void __iomem *ioaddr = lp->base;
770        unsigned int mii_reg, mask;
771
772        mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
773        mii_reg |= MII_MDOE;
774
775        for (mask = 1 << (bits - 1); mask; mask >>= 1) {
776                if (val & mask)
777                        mii_reg |= MII_MDO;
778                else
779                        mii_reg &= ~MII_MDO;
780
781                SMC_SET_MII(lp, mii_reg);
782                udelay(MII_DELAY);
783                SMC_SET_MII(lp, mii_reg | MII_MCLK);
784                udelay(MII_DELAY);
785        }
786}
787
788static unsigned int smc_mii_in(struct net_device *dev, int bits)
789{
790        struct smc_local *lp = netdev_priv(dev);
791        void __iomem *ioaddr = lp->base;
792        unsigned int mii_reg, mask, val;
793
794        mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
795        SMC_SET_MII(lp, mii_reg);
796
797        for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
798                if (SMC_GET_MII(lp) & MII_MDI)
799                        val |= mask;
800
801                SMC_SET_MII(lp, mii_reg);
802                udelay(MII_DELAY);
803                SMC_SET_MII(lp, mii_reg | MII_MCLK);
804                udelay(MII_DELAY);
805        }
806
807        return val;
808}
809
810/*
811 * Reads a register from the MII Management serial interface
812 */
813static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
814{
815        struct smc_local *lp = netdev_priv(dev);
816        void __iomem *ioaddr = lp->base;
817        unsigned int phydata;
818
819        SMC_SELECT_BANK(lp, 3);
820
821        /* Idle - 32 ones */
822        smc_mii_out(dev, 0xffffffff, 32);
823
824        /* Start code (01) + read (10) + phyaddr + phyreg */
825        smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
826
827        /* Turnaround (2bits) + phydata */
828        phydata = smc_mii_in(dev, 18);
829
830        /* Return to idle state */
831        SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
832
833        DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
834            __func__, phyaddr, phyreg, phydata);
835
836        SMC_SELECT_BANK(lp, 2);
837        return phydata;
838}
839
840/*
841 * Writes a register to the MII Management serial interface
842 */
843static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
844                          int phydata)
845{
846        struct smc_local *lp = netdev_priv(dev);
847        void __iomem *ioaddr = lp->base;
848
849        SMC_SELECT_BANK(lp, 3);
850
851        /* Idle - 32 ones */
852        smc_mii_out(dev, 0xffffffff, 32);
853
854        /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
855        smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
856
857        /* Return to idle state */
858        SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
859
860        DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
861            __func__, phyaddr, phyreg, phydata);
862
863        SMC_SELECT_BANK(lp, 2);
864}
865
866/*
867 * Finds and reports the PHY address
868 */
869static void smc_phy_detect(struct net_device *dev)
870{
871        struct smc_local *lp = netdev_priv(dev);
872        int phyaddr;
873
874        DBG(2, dev, "%s\n", __func__);
875
876        lp->phy_type = 0;
877
878        /*
879         * Scan all 32 PHY addresses if necessary, starting at
880         * PHY#1 to PHY#31, and then PHY#0 last.
881         */
882        for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
883                unsigned int id1, id2;
884
885                /* Read the PHY identifiers */
886                id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
887                id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
888
889                DBG(3, dev, "phy_id1=0x%x, phy_id2=0x%x\n",
890                    id1, id2);
891
892                /* Make sure it is a valid identifier */
893                if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
894                    id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
895                        /* Save the PHY's address */
896                        lp->mii.phy_id = phyaddr & 31;
897                        lp->phy_type = id1 << 16 | id2;
898                        break;
899                }
900        }
901}
902
903/*
904 * Sets the PHY to a configuration as determined by the user
905 */
906static int smc_phy_fixed(struct net_device *dev)
907{
908        struct smc_local *lp = netdev_priv(dev);
909        void __iomem *ioaddr = lp->base;
910        int phyaddr = lp->mii.phy_id;
911        int bmcr, cfg1;
912
913        DBG(3, dev, "%s\n", __func__);
914
915        /* Enter Link Disable state */
916        cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
917        cfg1 |= PHY_CFG1_LNKDIS;
918        smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
919
920        /*
921         * Set our fixed capabilities
922         * Disable auto-negotiation
923         */
924        bmcr = 0;
925
926        if (lp->ctl_rfduplx)
927                bmcr |= BMCR_FULLDPLX;
928
929        if (lp->ctl_rspeed == 100)
930                bmcr |= BMCR_SPEED100;
931
932        /* Write our capabilities to the phy control register */
933        smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
934
935        /* Re-Configure the Receive/Phy Control register */
936        SMC_SELECT_BANK(lp, 0);
937        SMC_SET_RPC(lp, lp->rpc_cur_mode);
938        SMC_SELECT_BANK(lp, 2);
939
940        return 1;
941}
942
943/**
944 * smc_phy_reset - reset the phy
945 * @dev: net device
946 * @phy: phy address
947 *
948 * Issue a software reset for the specified PHY and
949 * wait up to 100ms for the reset to complete.  We should
950 * not access the PHY for 50ms after issuing the reset.
951 *
952 * The time to wait appears to be dependent on the PHY.
953 *
954 * Must be called with lp->lock locked.
955 */
956static int smc_phy_reset(struct net_device *dev, int phy)
957{
958        struct smc_local *lp = netdev_priv(dev);
959        unsigned int bmcr;
960        int timeout;
961
962        smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
963
964        for (timeout = 2; timeout; timeout--) {
965                spin_unlock_irq(&lp->lock);
966                msleep(50);
967                spin_lock_irq(&lp->lock);
968
969                bmcr = smc_phy_read(dev, phy, MII_BMCR);
970                if (!(bmcr & BMCR_RESET))
971                        break;
972        }
973
974        return bmcr & BMCR_RESET;
975}
976
977/**
978 * smc_phy_powerdown - powerdown phy
979 * @dev: net device
980 *
981 * Power down the specified PHY
982 */
983static void smc_phy_powerdown(struct net_device *dev)
984{
985        struct smc_local *lp = netdev_priv(dev);
986        unsigned int bmcr;
987        int phy = lp->mii.phy_id;
988
989        if (lp->phy_type == 0)
990                return;
991
992        /* We need to ensure that no calls to smc_phy_configure are
993           pending.
994        */
995        cancel_work_sync(&lp->phy_configure);
996
997        bmcr = smc_phy_read(dev, phy, MII_BMCR);
998        smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
999}
1000
1001/**
1002 * smc_phy_check_media - check the media status and adjust TCR
1003 * @dev: net device
1004 * @init: set true for initialisation
1005 *
1006 * Select duplex mode depending on negotiation state.  This
1007 * also updates our carrier state.
1008 */
1009static void smc_phy_check_media(struct net_device *dev, int init)
1010{
1011        struct smc_local *lp = netdev_priv(dev);
1012        void __iomem *ioaddr = lp->base;
1013
1014        if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1015                /* duplex state has changed */
1016                if (lp->mii.full_duplex) {
1017                        lp->tcr_cur_mode |= TCR_SWFDUP;
1018                } else {
1019                        lp->tcr_cur_mode &= ~TCR_SWFDUP;
1020                }
1021
1022                SMC_SELECT_BANK(lp, 0);
1023                SMC_SET_TCR(lp, lp->tcr_cur_mode);
1024        }
1025}
1026
1027/*
1028 * Configures the specified PHY through the MII management interface
1029 * using Autonegotiation.
1030 * Calls smc_phy_fixed() if the user has requested a certain config.
1031 * If RPC ANEG bit is set, the media selection is dependent purely on
1032 * the selection by the MII (either in the MII BMCR reg or the result
1033 * of autonegotiation.)  If the RPC ANEG bit is cleared, the selection
1034 * is controlled by the RPC SPEED and RPC DPLX bits.
1035 */
1036static void smc_phy_configure(struct work_struct *work)
1037{
1038        struct smc_local *lp =
1039                container_of(work, struct smc_local, phy_configure);
1040        struct net_device *dev = lp->dev;
1041        void __iomem *ioaddr = lp->base;
1042        int phyaddr = lp->mii.phy_id;
1043        int my_phy_caps; /* My PHY capabilities */
1044        int my_ad_caps; /* My Advertised capabilities */
1045        int status;
1046
1047        DBG(3, dev, "smc_program_phy()\n");
1048
1049        spin_lock_irq(&lp->lock);
1050
1051        /*
1052         * We should not be called if phy_type is zero.
1053         */
1054        if (lp->phy_type == 0)
1055                goto smc_phy_configure_exit;
1056
1057        if (smc_phy_reset(dev, phyaddr)) {
1058                netdev_info(dev, "PHY reset timed out\n");
1059                goto smc_phy_configure_exit;
1060        }
1061
1062        /*
1063         * Enable PHY Interrupts (for register 18)
1064         * Interrupts listed here are disabled
1065         */
1066        smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1067                PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1068                PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1069                PHY_INT_SPDDET | PHY_INT_DPLXDET);
1070
1071        /* Configure the Receive/Phy Control register */
1072        SMC_SELECT_BANK(lp, 0);
1073        SMC_SET_RPC(lp, lp->rpc_cur_mode);
1074
1075        /* If the user requested no auto neg, then go set his request */
1076        if (lp->mii.force_media) {
1077                smc_phy_fixed(dev);
1078                goto smc_phy_configure_exit;
1079        }
1080
1081        /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1082        my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1083
1084        if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1085                netdev_info(dev, "Auto negotiation NOT supported\n");
1086                smc_phy_fixed(dev);
1087                goto smc_phy_configure_exit;
1088        }
1089
1090        my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1091
1092        if (my_phy_caps & BMSR_100BASE4)
1093                my_ad_caps |= ADVERTISE_100BASE4;
1094        if (my_phy_caps & BMSR_100FULL)
1095                my_ad_caps |= ADVERTISE_100FULL;
1096        if (my_phy_caps & BMSR_100HALF)
1097                my_ad_caps |= ADVERTISE_100HALF;
1098        if (my_phy_caps & BMSR_10FULL)
1099                my_ad_caps |= ADVERTISE_10FULL;
1100        if (my_phy_caps & BMSR_10HALF)
1101                my_ad_caps |= ADVERTISE_10HALF;
1102
1103        /* Disable capabilities not selected by our user */
1104        if (lp->ctl_rspeed != 100)
1105                my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1106
1107        if (!lp->ctl_rfduplx)
1108                my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1109
1110        /* Update our Auto-Neg Advertisement Register */
1111        smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1112        lp->mii.advertising = my_ad_caps;
1113
1114        /*
1115         * Read the register back.  Without this, it appears that when
1116         * auto-negotiation is restarted, sometimes it isn't ready and
1117         * the link does not come up.
1118         */
1119        status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1120
1121        DBG(2, dev, "phy caps=%x\n", my_phy_caps);
1122        DBG(2, dev, "phy advertised caps=%x\n", my_ad_caps);
1123
1124        /* Restart auto-negotiation process in order to advertise my caps */
1125        smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1126
1127        smc_phy_check_media(dev, 1);
1128
1129smc_phy_configure_exit:
1130        SMC_SELECT_BANK(lp, 2);
1131        spin_unlock_irq(&lp->lock);
1132}
1133
1134/*
1135 * smc_phy_interrupt
1136 *
1137 * Purpose:  Handle interrupts relating to PHY register 18. This is
1138 *  called from the "hard" interrupt handler under our private spinlock.
1139 */
1140static void smc_phy_interrupt(struct net_device *dev)
1141{
1142        struct smc_local *lp = netdev_priv(dev);
1143        int phyaddr = lp->mii.phy_id;
1144        int phy18;
1145
1146        DBG(2, dev, "%s\n", __func__);
1147
1148        if (lp->phy_type == 0)
1149                return;
1150
1151        for(;;) {
1152                smc_phy_check_media(dev, 0);
1153
1154                /* Read PHY Register 18, Status Output */
1155                phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1156                if ((phy18 & PHY_INT_INT) == 0)
1157                        break;
1158        }
1159}
1160
1161/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1162
1163static void smc_10bt_check_media(struct net_device *dev, int init)
1164{
1165        struct smc_local *lp = netdev_priv(dev);
1166        void __iomem *ioaddr = lp->base;
1167        unsigned int old_carrier, new_carrier;
1168
1169        old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1170
1171        SMC_SELECT_BANK(lp, 0);
1172        new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1173        SMC_SELECT_BANK(lp, 2);
1174
1175        if (init || (old_carrier != new_carrier)) {
1176                if (!new_carrier) {
1177                        netif_carrier_off(dev);
1178                } else {
1179                        netif_carrier_on(dev);
1180                }
1181                if (netif_msg_link(lp))
1182                        netdev_info(dev, "link %s\n",
1183                                    new_carrier ? "up" : "down");
1184        }
1185}
1186
1187static void smc_eph_interrupt(struct net_device *dev)
1188{
1189        struct smc_local *lp = netdev_priv(dev);
1190        void __iomem *ioaddr = lp->base;
1191        unsigned int ctl;
1192
1193        smc_10bt_check_media(dev, 0);
1194
1195        SMC_SELECT_BANK(lp, 1);
1196        ctl = SMC_GET_CTL(lp);
1197        SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1198        SMC_SET_CTL(lp, ctl);
1199        SMC_SELECT_BANK(lp, 2);
1200}
1201
1202/*
1203 * This is the main routine of the driver, to handle the device when
1204 * it needs some attention.
1205 */
1206static irqreturn_t smc_interrupt(int irq, void *dev_id)
1207{
1208        struct net_device *dev = dev_id;
1209        struct smc_local *lp = netdev_priv(dev);
1210        void __iomem *ioaddr = lp->base;
1211        int status, mask, timeout, card_stats;
1212        int saved_pointer;
1213
1214        DBG(3, dev, "%s\n", __func__);
1215
1216        spin_lock(&lp->lock);
1217
1218        /* A preamble may be used when there is a potential race
1219         * between the interruptible transmit functions and this
1220         * ISR. */
1221        SMC_INTERRUPT_PREAMBLE;
1222
1223        saved_pointer = SMC_GET_PTR(lp);
1224        mask = SMC_GET_INT_MASK(lp);
1225        SMC_SET_INT_MASK(lp, 0);
1226
1227        /* set a timeout value, so I don't stay here forever */
1228        timeout = MAX_IRQ_LOOPS;
1229
1230        do {
1231                status = SMC_GET_INT(lp);
1232
1233                DBG(2, dev, "INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1234                    status, mask,
1235                    ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1236                       meminfo = SMC_GET_MIR(lp);
1237                       SMC_SELECT_BANK(lp, 2); meminfo; }),
1238                    SMC_GET_FIFO(lp));
1239
1240                status &= mask;
1241                if (!status)
1242                        break;
1243
1244                if (status & IM_TX_INT) {
1245                        /* do this before RX as it will free memory quickly */
1246                        DBG(3, dev, "TX int\n");
1247                        smc_tx(dev);
1248                        SMC_ACK_INT(lp, IM_TX_INT);
1249                        if (THROTTLE_TX_PKTS)
1250                                netif_wake_queue(dev);
1251                } else if (status & IM_RCV_INT) {
1252                        DBG(3, dev, "RX irq\n");
1253                        smc_rcv(dev);
1254                } else if (status & IM_ALLOC_INT) {
1255                        DBG(3, dev, "Allocation irq\n");
1256                        tasklet_hi_schedule(&lp->tx_task);
1257                        mask &= ~IM_ALLOC_INT;
1258                } else if (status & IM_TX_EMPTY_INT) {
1259                        DBG(3, dev, "TX empty\n");
1260                        mask &= ~IM_TX_EMPTY_INT;
1261
1262                        /* update stats */
1263                        SMC_SELECT_BANK(lp, 0);
1264                        card_stats = SMC_GET_COUNTER(lp);
1265                        SMC_SELECT_BANK(lp, 2);
1266
1267                        /* single collisions */
1268                        dev->stats.collisions += card_stats & 0xF;
1269                        card_stats >>= 4;
1270
1271                        /* multiple collisions */
1272                        dev->stats.collisions += card_stats & 0xF;
1273                } else if (status & IM_RX_OVRN_INT) {
1274                        DBG(1, dev, "RX overrun (EPH_ST 0x%04x)\n",
1275                            ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1276                               eph_st = SMC_GET_EPH_STATUS(lp);
1277                               SMC_SELECT_BANK(lp, 2); eph_st; }));
1278                        SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1279                        dev->stats.rx_errors++;
1280                        dev->stats.rx_fifo_errors++;
1281                } else if (status & IM_EPH_INT) {
1282                        smc_eph_interrupt(dev);
1283                } else if (status & IM_MDINT) {
1284                        SMC_ACK_INT(lp, IM_MDINT);
1285                        smc_phy_interrupt(dev);
1286                } else if (status & IM_ERCV_INT) {
1287                        SMC_ACK_INT(lp, IM_ERCV_INT);
1288                        PRINTK(dev, "UNSUPPORTED: ERCV INTERRUPT\n");
1289                }
1290        } while (--timeout);
1291
1292        /* restore register states */
1293        SMC_SET_PTR(lp, saved_pointer);
1294        SMC_SET_INT_MASK(lp, mask);
1295        spin_unlock(&lp->lock);
1296
1297#ifndef CONFIG_NET_POLL_CONTROLLER
1298        if (timeout == MAX_IRQ_LOOPS)
1299                PRINTK(dev, "spurious interrupt (mask = 0x%02x)\n",
1300                       mask);
1301#endif
1302        DBG(3, dev, "Interrupt done (%d loops)\n",
1303            MAX_IRQ_LOOPS - timeout);
1304
1305        /*
1306         * We return IRQ_HANDLED unconditionally here even if there was
1307         * nothing to do.  There is a possibility that a packet might
1308         * get enqueued into the chip right after TX_EMPTY_INT is raised
1309         * but just before the CPU acknowledges the IRQ.
1310         * Better take an unneeded IRQ in some occasions than complexifying
1311         * the code for all cases.
1312         */
1313        return IRQ_HANDLED;
1314}
1315
1316#ifdef CONFIG_NET_POLL_CONTROLLER
1317/*
1318 * Polling receive - used by netconsole and other diagnostic tools
1319 * to allow network i/o with interrupts disabled.
1320 */
1321static void smc_poll_controller(struct net_device *dev)
1322{
1323        disable_irq(dev->irq);
1324        smc_interrupt(dev->irq, dev);
1325        enable_irq(dev->irq);
1326}
1327#endif
1328
1329/* Our watchdog timed out. Called by the networking layer */
1330static void smc_timeout(struct net_device *dev)
1331{
1332        struct smc_local *lp = netdev_priv(dev);
1333        void __iomem *ioaddr = lp->base;
1334        int status, mask, eph_st, meminfo, fifo;
1335
1336        DBG(2, dev, "%s\n", __func__);
1337
1338        spin_lock_irq(&lp->lock);
1339        status = SMC_GET_INT(lp);
1340        mask = SMC_GET_INT_MASK(lp);
1341        fifo = SMC_GET_FIFO(lp);
1342        SMC_SELECT_BANK(lp, 0);
1343        eph_st = SMC_GET_EPH_STATUS(lp);
1344        meminfo = SMC_GET_MIR(lp);
1345        SMC_SELECT_BANK(lp, 2);
1346        spin_unlock_irq(&lp->lock);
1347        PRINTK(dev, "TX timeout (INT 0x%02x INTMASK 0x%02x MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1348               status, mask, meminfo, fifo, eph_st);
1349
1350        smc_reset(dev);
1351        smc_enable(dev);
1352
1353        /*
1354         * Reconfiguring the PHY doesn't seem like a bad idea here, but
1355         * smc_phy_configure() calls msleep() which calls schedule_timeout()
1356         * which calls schedule().  Hence we use a work queue.
1357         */
1358        if (lp->phy_type != 0)
1359                schedule_work(&lp->phy_configure);
1360
1361        /* We can accept TX packets again */
1362        dev->trans_start = jiffies; /* prevent tx timeout */
1363        netif_wake_queue(dev);
1364}
1365
1366/*
1367 * This routine will, depending on the values passed to it,
1368 * either make it accept multicast packets, go into
1369 * promiscuous mode (for TCPDUMP and cousins) or accept
1370 * a select set of multicast packets
1371 */
1372static void smc_set_multicast_list(struct net_device *dev)
1373{
1374        struct smc_local *lp = netdev_priv(dev);
1375        void __iomem *ioaddr = lp->base;
1376        unsigned char multicast_table[8];
1377        int update_multicast = 0;
1378
1379        DBG(2, dev, "%s\n", __func__);
1380
1381        if (dev->flags & IFF_PROMISC) {
1382                DBG(2, dev, "RCR_PRMS\n");
1383                lp->rcr_cur_mode |= RCR_PRMS;
1384        }
1385
1386/* BUG?  I never disable promiscuous mode if multicasting was turned on.
1387   Now, I turn off promiscuous mode, but I don't do anything to multicasting
1388   when promiscuous mode is turned on.
1389*/
1390
1391        /*
1392         * Here, I am setting this to accept all multicast packets.
1393         * I don't need to zero the multicast table, because the flag is
1394         * checked before the table is
1395         */
1396        else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1397                DBG(2, dev, "RCR_ALMUL\n");
1398                lp->rcr_cur_mode |= RCR_ALMUL;
1399        }
1400
1401        /*
1402         * This sets the internal hardware table to filter out unwanted
1403         * multicast packets before they take up memory.
1404         *
1405         * The SMC chip uses a hash table where the high 6 bits of the CRC of
1406         * address are the offset into the table.  If that bit is 1, then the
1407         * multicast packet is accepted.  Otherwise, it's dropped silently.
1408         *
1409         * To use the 6 bits as an offset into the table, the high 3 bits are
1410         * the number of the 8 bit register, while the low 3 bits are the bit
1411         * within that register.
1412         */
1413        else if (!netdev_mc_empty(dev)) {
1414                struct netdev_hw_addr *ha;
1415
1416                /* table for flipping the order of 3 bits */
1417                static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1418
1419                /* start with a table of all zeros: reject all */
1420                memset(multicast_table, 0, sizeof(multicast_table));
1421
1422                netdev_for_each_mc_addr(ha, dev) {
1423                        int position;
1424
1425                        /* only use the low order bits */
1426                        position = crc32_le(~0, ha->addr, 6) & 0x3f;
1427
1428                        /* do some messy swapping to put the bit in the right spot */
1429                        multicast_table[invert3[position&7]] |=
1430                                (1<<invert3[(position>>3)&7]);
1431                }
1432
1433                /* be sure I get rid of flags I might have set */
1434                lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1435
1436                /* now, the table can be loaded into the chipset */
1437                update_multicast = 1;
1438        } else  {
1439                DBG(2, dev, "~(RCR_PRMS|RCR_ALMUL)\n");
1440                lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1441
1442                /*
1443                 * since I'm disabling all multicast entirely, I need to
1444                 * clear the multicast list
1445                 */
1446                memset(multicast_table, 0, sizeof(multicast_table));
1447                update_multicast = 1;
1448        }
1449
1450        spin_lock_irq(&lp->lock);
1451        SMC_SELECT_BANK(lp, 0);
1452        SMC_SET_RCR(lp, lp->rcr_cur_mode);
1453        if (update_multicast) {
1454                SMC_SELECT_BANK(lp, 3);
1455                SMC_SET_MCAST(lp, multicast_table);
1456        }
1457        SMC_SELECT_BANK(lp, 2);
1458        spin_unlock_irq(&lp->lock);
1459}
1460
1461
1462/*
1463 * Open and Initialize the board
1464 *
1465 * Set up everything, reset the card, etc..
1466 */
1467static int
1468smc_open(struct net_device *dev)
1469{
1470        struct smc_local *lp = netdev_priv(dev);
1471
1472        DBG(2, dev, "%s\n", __func__);
1473
1474        /* Setup the default Register Modes */
1475        lp->tcr_cur_mode = TCR_DEFAULT;
1476        lp->rcr_cur_mode = RCR_DEFAULT;
1477        lp->rpc_cur_mode = RPC_DEFAULT |
1478                                lp->cfg.leda << RPC_LSXA_SHFT |
1479                                lp->cfg.ledb << RPC_LSXB_SHFT;
1480
1481        /*
1482         * If we are not using a MII interface, we need to
1483         * monitor our own carrier signal to detect faults.
1484         */
1485        if (lp->phy_type == 0)
1486                lp->tcr_cur_mode |= TCR_MON_CSN;
1487
1488        /* reset the hardware */
1489        smc_reset(dev);
1490        smc_enable(dev);
1491
1492        /* Configure the PHY, initialize the link state */
1493        if (lp->phy_type != 0)
1494                smc_phy_configure(&lp->phy_configure);
1495        else {
1496                spin_lock_irq(&lp->lock);
1497                smc_10bt_check_media(dev, 1);
1498                spin_unlock_irq(&lp->lock);
1499        }
1500
1501        netif_start_queue(dev);
1502        return 0;
1503}
1504
1505/*
1506 * smc_close
1507 *
1508 * this makes the board clean up everything that it can
1509 * and not talk to the outside world.   Caused by
1510 * an 'ifconfig ethX down'
1511 */
1512static int smc_close(struct net_device *dev)
1513{
1514        struct smc_local *lp = netdev_priv(dev);
1515
1516        DBG(2, dev, "%s\n", __func__);
1517
1518        netif_stop_queue(dev);
1519        netif_carrier_off(dev);
1520
1521        /* clear everything */
1522        smc_shutdown(dev);
1523        tasklet_kill(&lp->tx_task);
1524        smc_phy_powerdown(dev);
1525        return 0;
1526}
1527
1528/*
1529 * Ethtool support
1530 */
1531static int
1532smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1533{
1534        struct smc_local *lp = netdev_priv(dev);
1535        int ret;
1536
1537        cmd->maxtxpkt = 1;
1538        cmd->maxrxpkt = 1;
1539
1540        if (lp->phy_type != 0) {
1541                spin_lock_irq(&lp->lock);
1542                ret = mii_ethtool_gset(&lp->mii, cmd);
1543                spin_unlock_irq(&lp->lock);
1544        } else {
1545                cmd->supported = SUPPORTED_10baseT_Half |
1546                                 SUPPORTED_10baseT_Full |
1547                                 SUPPORTED_TP | SUPPORTED_AUI;
1548
1549                if (lp->ctl_rspeed == 10)
1550                        ethtool_cmd_speed_set(cmd, SPEED_10);
1551                else if (lp->ctl_rspeed == 100)
1552                        ethtool_cmd_speed_set(cmd, SPEED_100);
1553
1554                cmd->autoneg = AUTONEG_DISABLE;
1555                cmd->transceiver = XCVR_INTERNAL;
1556                cmd->port = 0;
1557                cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1558
1559                ret = 0;
1560        }
1561
1562        return ret;
1563}
1564
1565static int
1566smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1567{
1568        struct smc_local *lp = netdev_priv(dev);
1569        int ret;
1570
1571        if (lp->phy_type != 0) {
1572                spin_lock_irq(&lp->lock);
1573                ret = mii_ethtool_sset(&lp->mii, cmd);
1574                spin_unlock_irq(&lp->lock);
1575        } else {
1576                if (cmd->autoneg != AUTONEG_DISABLE ||
1577                    cmd->speed != SPEED_10 ||
1578                    (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1579                    (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1580                        return -EINVAL;
1581
1582//              lp->port = cmd->port;
1583                lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1584
1585//              if (netif_running(dev))
1586//                      smc_set_port(dev);
1587
1588                ret = 0;
1589        }
1590
1591        return ret;
1592}
1593
1594static void
1595smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1596{
1597        strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1598        strlcpy(info->version, version, sizeof(info->version));
1599        strlcpy(info->bus_info, dev_name(dev->dev.parent),
1600                sizeof(info->bus_info));
1601}
1602
1603static int smc_ethtool_nwayreset(struct net_device *dev)
1604{
1605        struct smc_local *lp = netdev_priv(dev);
1606        int ret = -EINVAL;
1607
1608        if (lp->phy_type != 0) {
1609                spin_lock_irq(&lp->lock);
1610                ret = mii_nway_restart(&lp->mii);
1611                spin_unlock_irq(&lp->lock);
1612        }
1613
1614        return ret;
1615}
1616
1617static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1618{
1619        struct smc_local *lp = netdev_priv(dev);
1620        return lp->msg_enable;
1621}
1622
1623static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1624{
1625        struct smc_local *lp = netdev_priv(dev);
1626        lp->msg_enable = level;
1627}
1628
1629static int smc_write_eeprom_word(struct net_device *dev, u16 addr, u16 word)
1630{
1631        u16 ctl;
1632        struct smc_local *lp = netdev_priv(dev);
1633        void __iomem *ioaddr = lp->base;
1634
1635        spin_lock_irq(&lp->lock);
1636        /* load word into GP register */
1637        SMC_SELECT_BANK(lp, 1);
1638        SMC_SET_GP(lp, word);
1639        /* set the address to put the data in EEPROM */
1640        SMC_SELECT_BANK(lp, 2);
1641        SMC_SET_PTR(lp, addr);
1642        /* tell it to write */
1643        SMC_SELECT_BANK(lp, 1);
1644        ctl = SMC_GET_CTL(lp);
1645        SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1646        /* wait for it to finish */
1647        do {
1648                udelay(1);
1649        } while (SMC_GET_CTL(lp) & CTL_STORE);
1650        /* clean up */
1651        SMC_SET_CTL(lp, ctl);
1652        SMC_SELECT_BANK(lp, 2);
1653        spin_unlock_irq(&lp->lock);
1654        return 0;
1655}
1656
1657static int smc_read_eeprom_word(struct net_device *dev, u16 addr, u16 *word)
1658{
1659        u16 ctl;
1660        struct smc_local *lp = netdev_priv(dev);
1661        void __iomem *ioaddr = lp->base;
1662
1663        spin_lock_irq(&lp->lock);
1664        /* set the EEPROM address to get the data from */
1665        SMC_SELECT_BANK(lp, 2);
1666        SMC_SET_PTR(lp, addr | PTR_READ);
1667        /* tell it to load */
1668        SMC_SELECT_BANK(lp, 1);
1669        SMC_SET_GP(lp, 0xffff); /* init to known */
1670        ctl = SMC_GET_CTL(lp);
1671        SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1672        /* wait for it to finish */
1673        do {
1674                udelay(1);
1675        } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1676        /* read word from GP register */
1677        *word = SMC_GET_GP(lp);
1678        /* clean up */
1679        SMC_SET_CTL(lp, ctl);
1680        SMC_SELECT_BANK(lp, 2);
1681        spin_unlock_irq(&lp->lock);
1682        return 0;
1683}
1684
1685static int smc_ethtool_geteeprom_len(struct net_device *dev)
1686{
1687        return 0x23 * 2;
1688}
1689
1690static int smc_ethtool_geteeprom(struct net_device *dev,
1691                struct ethtool_eeprom *eeprom, u8 *data)
1692{
1693        int i;
1694        int imax;
1695
1696        DBG(1, dev, "Reading %d bytes at %d(0x%x)\n",
1697                eeprom->len, eeprom->offset, eeprom->offset);
1698        imax = smc_ethtool_geteeprom_len(dev);
1699        for (i = 0; i < eeprom->len; i += 2) {
1700                int ret;
1701                u16 wbuf;
1702                int offset = i + eeprom->offset;
1703                if (offset > imax)
1704                        break;
1705                ret = smc_read_eeprom_word(dev, offset >> 1, &wbuf);
1706                if (ret != 0)
1707                        return ret;
1708                DBG(2, dev, "Read 0x%x from 0x%x\n", wbuf, offset >> 1);
1709                data[i] = (wbuf >> 8) & 0xff;
1710                data[i+1] = wbuf & 0xff;
1711        }
1712        return 0;
1713}
1714
1715static int smc_ethtool_seteeprom(struct net_device *dev,
1716                struct ethtool_eeprom *eeprom, u8 *data)
1717{
1718        int i;
1719        int imax;
1720
1721        DBG(1, dev, "Writing %d bytes to %d(0x%x)\n",
1722            eeprom->len, eeprom->offset, eeprom->offset);
1723        imax = smc_ethtool_geteeprom_len(dev);
1724        for (i = 0; i < eeprom->len; i += 2) {
1725                int ret;
1726                u16 wbuf;
1727                int offset = i + eeprom->offset;
1728                if (offset > imax)
1729                        break;
1730                wbuf = (data[i] << 8) | data[i + 1];
1731                DBG(2, dev, "Writing 0x%x to 0x%x\n", wbuf, offset >> 1);
1732                ret = smc_write_eeprom_word(dev, offset >> 1, wbuf);
1733                if (ret != 0)
1734                        return ret;
1735        }
1736        return 0;
1737}
1738
1739
1740static const struct ethtool_ops smc_ethtool_ops = {
1741        .get_settings   = smc_ethtool_getsettings,
1742        .set_settings   = smc_ethtool_setsettings,
1743        .get_drvinfo    = smc_ethtool_getdrvinfo,
1744
1745        .get_msglevel   = smc_ethtool_getmsglevel,
1746        .set_msglevel   = smc_ethtool_setmsglevel,
1747        .nway_reset     = smc_ethtool_nwayreset,
1748        .get_link       = ethtool_op_get_link,
1749        .get_eeprom_len = smc_ethtool_geteeprom_len,
1750        .get_eeprom     = smc_ethtool_geteeprom,
1751        .set_eeprom     = smc_ethtool_seteeprom,
1752};
1753
1754static const struct net_device_ops smc_netdev_ops = {
1755        .ndo_open               = smc_open,
1756        .ndo_stop               = smc_close,
1757        .ndo_start_xmit         = smc_hard_start_xmit,
1758        .ndo_tx_timeout         = smc_timeout,
1759        .ndo_set_rx_mode        = smc_set_multicast_list,
1760        .ndo_change_mtu         = eth_change_mtu,
1761        .ndo_validate_addr      = eth_validate_addr,
1762        .ndo_set_mac_address    = eth_mac_addr,
1763#ifdef CONFIG_NET_POLL_CONTROLLER
1764        .ndo_poll_controller    = smc_poll_controller,
1765#endif
1766};
1767
1768/*
1769 * smc_findirq
1770 *
1771 * This routine has a simple purpose -- make the SMC chip generate an
1772 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1773 */
1774/*
1775 * does this still work?
1776 *
1777 * I just deleted auto_irq.c, since it was never built...
1778 *   --jgarzik
1779 */
1780static int smc_findirq(struct smc_local *lp)
1781{
1782        void __iomem *ioaddr = lp->base;
1783        int timeout = 20;
1784        unsigned long cookie;
1785
1786        DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1787
1788        cookie = probe_irq_on();
1789
1790        /*
1791         * What I try to do here is trigger an ALLOC_INT. This is done
1792         * by allocating a small chunk of memory, which will give an interrupt
1793         * when done.
1794         */
1795        /* enable ALLOCation interrupts ONLY */
1796        SMC_SELECT_BANK(lp, 2);
1797        SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1798
1799        /*
1800         * Allocate 512 bytes of memory.  Note that the chip was just
1801         * reset so all the memory is available
1802         */
1803        SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1804
1805        /*
1806         * Wait until positive that the interrupt has been generated
1807         */
1808        do {
1809                int int_status;
1810                udelay(10);
1811                int_status = SMC_GET_INT(lp);
1812                if (int_status & IM_ALLOC_INT)
1813                        break;          /* got the interrupt */
1814        } while (--timeout);
1815
1816        /*
1817         * there is really nothing that I can do here if timeout fails,
1818         * as autoirq_report will return a 0 anyway, which is what I
1819         * want in this case.   Plus, the clean up is needed in both
1820         * cases.
1821         */
1822
1823        /* and disable all interrupts again */
1824        SMC_SET_INT_MASK(lp, 0);
1825
1826        /* and return what I found */
1827        return probe_irq_off(cookie);
1828}
1829
1830/*
1831 * Function: smc_probe(unsigned long ioaddr)
1832 *
1833 * Purpose:
1834 *      Tests to see if a given ioaddr points to an SMC91x chip.
1835 *      Returns a 0 on success
1836 *
1837 * Algorithm:
1838 *      (1) see if the high byte of BANK_SELECT is 0x33
1839 *      (2) compare the ioaddr with the base register's address
1840 *      (3) see if I recognize the chip ID in the appropriate register
1841 *
1842 * Here I do typical initialization tasks.
1843 *
1844 * o  Initialize the structure if needed
1845 * o  print out my vanity message if not done so already
1846 * o  print out what type of hardware is detected
1847 * o  print out the ethernet address
1848 * o  find the IRQ
1849 * o  set up my private data
1850 * o  configure the dev structure with my subroutines
1851 * o  actually GRAB the irq.
1852 * o  GRAB the region
1853 */
1854static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
1855                     unsigned long irq_flags)
1856{
1857        struct smc_local *lp = netdev_priv(dev);
1858        int retval;
1859        unsigned int val, revision_register;
1860        const char *version_string;
1861
1862        DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
1863
1864        /* First, see if the high byte is 0x33 */
1865        val = SMC_CURRENT_BANK(lp);
1866        DBG(2, dev, "%s: bank signature probe returned 0x%04x\n",
1867            CARDNAME, val);
1868        if ((val & 0xFF00) != 0x3300) {
1869                if ((val & 0xFF) == 0x33) {
1870                        netdev_warn(dev,
1871                                    "%s: Detected possible byte-swapped interface at IOADDR %p\n",
1872                                    CARDNAME, ioaddr);
1873                }
1874                retval = -ENODEV;
1875                goto err_out;
1876        }
1877
1878        /*
1879         * The above MIGHT indicate a device, but I need to write to
1880         * further test this.
1881         */
1882        SMC_SELECT_BANK(lp, 0);
1883        val = SMC_CURRENT_BANK(lp);
1884        if ((val & 0xFF00) != 0x3300) {
1885                retval = -ENODEV;
1886                goto err_out;
1887        }
1888
1889        /*
1890         * well, we've already written once, so hopefully another
1891         * time won't hurt.  This time, I need to switch the bank
1892         * register to bank 1, so I can access the base address
1893         * register
1894         */
1895        SMC_SELECT_BANK(lp, 1);
1896        val = SMC_GET_BASE(lp);
1897        val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1898        if (((unsigned long)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1899                netdev_warn(dev, "%s: IOADDR %p doesn't match configuration (%x).\n",
1900                            CARDNAME, ioaddr, val);
1901        }
1902
1903        /*
1904         * check if the revision register is something that I
1905         * recognize.  These might need to be added to later,
1906         * as future revisions could be added.
1907         */
1908        SMC_SELECT_BANK(lp, 3);
1909        revision_register = SMC_GET_REV(lp);
1910        DBG(2, dev, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1911        version_string = chip_ids[ (revision_register >> 4) & 0xF];
1912        if (!version_string || (revision_register & 0xff00) != 0x3300) {
1913                /* I don't recognize this chip, so... */
1914                netdev_warn(dev, "%s: IO %p: Unrecognized revision register 0x%04x, Contact author.\n",
1915                            CARDNAME, ioaddr, revision_register);
1916
1917                retval = -ENODEV;
1918                goto err_out;
1919        }
1920
1921        /* At this point I'll assume that the chip is an SMC91x. */
1922        pr_info_once("%s\n", version);
1923
1924        /* fill in some of the fields */
1925        dev->base_addr = (unsigned long)ioaddr;
1926        lp->base = ioaddr;
1927        lp->version = revision_register & 0xff;
1928        spin_lock_init(&lp->lock);
1929
1930        /* Get the MAC address */
1931        SMC_SELECT_BANK(lp, 1);
1932        SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1933
1934        /* now, reset the chip, and put it into a known state */
1935        smc_reset(dev);
1936
1937        /*
1938         * If dev->irq is 0, then the device has to be banged on to see
1939         * what the IRQ is.
1940         *
1941         * This banging doesn't always detect the IRQ, for unknown reasons.
1942         * a workaround is to reset the chip and try again.
1943         *
1944         * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1945         * be what is requested on the command line.   I don't do that, mostly
1946         * because the card that I have uses a non-standard method of accessing
1947         * the IRQs, and because this _should_ work in most configurations.
1948         *
1949         * Specifying an IRQ is done with the assumption that the user knows
1950         * what (s)he is doing.  No checking is done!!!!
1951         */
1952        if (dev->irq < 1) {
1953                int trials;
1954
1955                trials = 3;
1956                while (trials--) {
1957                        dev->irq = smc_findirq(lp);
1958                        if (dev->irq)
1959                                break;
1960                        /* kick the card and try again */
1961                        smc_reset(dev);
1962                }
1963        }
1964        if (dev->irq == 0) {
1965                netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1966                retval = -ENODEV;
1967                goto err_out;
1968        }
1969        dev->irq = irq_canonicalize(dev->irq);
1970
1971        dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1972        dev->netdev_ops = &smc_netdev_ops;
1973        dev->ethtool_ops = &smc_ethtool_ops;
1974
1975        tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1976        INIT_WORK(&lp->phy_configure, smc_phy_configure);
1977        lp->dev = dev;
1978        lp->mii.phy_id_mask = 0x1f;
1979        lp->mii.reg_num_mask = 0x1f;
1980        lp->mii.force_media = 0;
1981        lp->mii.full_duplex = 0;
1982        lp->mii.dev = dev;
1983        lp->mii.mdio_read = smc_phy_read;
1984        lp->mii.mdio_write = smc_phy_write;
1985
1986        /*
1987         * Locate the phy, if any.
1988         */
1989        if (lp->version >= (CHIP_91100 << 4))
1990                smc_phy_detect(dev);
1991
1992        /* then shut everything down to save power */
1993        smc_shutdown(dev);
1994        smc_phy_powerdown(dev);
1995
1996        /* Set default parameters */
1997        lp->msg_enable = NETIF_MSG_LINK;
1998        lp->ctl_rfduplx = 0;
1999        lp->ctl_rspeed = 10;
2000
2001        if (lp->version >= (CHIP_91100 << 4)) {
2002                lp->ctl_rfduplx = 1;
2003                lp->ctl_rspeed = 100;
2004        }
2005
2006        /* Grab the IRQ */
2007        retval = request_irq(dev->irq, smc_interrupt, irq_flags, dev->name, dev);
2008        if (retval)
2009                goto err_out;
2010
2011#ifdef CONFIG_ARCH_PXA
2012#  ifdef SMC_USE_PXA_DMA
2013        lp->cfg.flags |= SMC91X_USE_DMA;
2014#  endif
2015        if (lp->cfg.flags & SMC91X_USE_DMA) {
2016                int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2017                                          smc_pxa_dma_irq, NULL);
2018                if (dma >= 0)
2019                        dev->dma = dma;
2020        }
2021#endif
2022
2023        retval = register_netdev(dev);
2024        if (retval == 0) {
2025                /* now, print out the card info, in a short format.. */
2026                netdev_info(dev, "%s (rev %d) at %p IRQ %d",
2027                            version_string, revision_register & 0x0f,
2028                            lp->base, dev->irq);
2029
2030                if (dev->dma != (unsigned char)-1)
2031                        pr_cont(" DMA %d", dev->dma);
2032
2033                pr_cont("%s%s\n",
2034                        lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2035                        THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2036
2037                if (!is_valid_ether_addr(dev->dev_addr)) {
2038                        netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2039                } else {
2040                        /* Print the Ethernet address */
2041                        netdev_info(dev, "Ethernet addr: %pM\n",
2042                                    dev->dev_addr);
2043                }
2044
2045                if (lp->phy_type == 0) {
2046                        PRINTK(dev, "No PHY found\n");
2047                } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2048                        PRINTK(dev, "PHY LAN83C183 (LAN91C111 Internal)\n");
2049                } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2050                        PRINTK(dev, "PHY LAN83C180\n");
2051                }
2052        }
2053
2054err_out:
2055#ifdef CONFIG_ARCH_PXA
2056        if (retval && dev->dma != (unsigned char)-1)
2057                pxa_free_dma(dev->dma);
2058#endif
2059        return retval;
2060}
2061
2062static int smc_enable_device(struct platform_device *pdev)
2063{
2064        struct net_device *ndev = platform_get_drvdata(pdev);
2065        struct smc_local *lp = netdev_priv(ndev);
2066        unsigned long flags;
2067        unsigned char ecor, ecsr;
2068        void __iomem *addr;
2069        struct resource * res;
2070
2071        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2072        if (!res)
2073                return 0;
2074
2075        /*
2076         * Map the attribute space.  This is overkill, but clean.
2077         */
2078        addr = ioremap(res->start, ATTRIB_SIZE);
2079        if (!addr)
2080                return -ENOMEM;
2081
2082        /*
2083         * Reset the device.  We must disable IRQs around this
2084         * since a reset causes the IRQ line become active.
2085         */
2086        local_irq_save(flags);
2087        ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2088        writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2089        readb(addr + (ECOR << SMC_IO_SHIFT));
2090
2091        /*
2092         * Wait 100us for the chip to reset.
2093         */
2094        udelay(100);
2095
2096        /*
2097         * The device will ignore all writes to the enable bit while
2098         * reset is asserted, even if the reset bit is cleared in the
2099         * same write.  Must clear reset first, then enable the device.
2100         */
2101        writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2102        writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2103
2104        /*
2105         * Set the appropriate byte/word mode.
2106         */
2107        ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2108        if (!SMC_16BIT(lp))
2109                ecsr |= ECSR_IOIS8;
2110        writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2111        local_irq_restore(flags);
2112
2113        iounmap(addr);
2114
2115        /*
2116         * Wait for the chip to wake up.  We could poll the control
2117         * register in the main register space, but that isn't mapped
2118         * yet.  We know this is going to take 750us.
2119         */
2120        msleep(1);
2121
2122        return 0;
2123}
2124
2125static int smc_request_attrib(struct platform_device *pdev,
2126                              struct net_device *ndev)
2127{
2128        struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2129        struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2130
2131        if (!res)
2132                return 0;
2133
2134        if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2135                return -EBUSY;
2136
2137        return 0;
2138}
2139
2140static void smc_release_attrib(struct platform_device *pdev,
2141                               struct net_device *ndev)
2142{
2143        struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2144        struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2145
2146        if (res)
2147                release_mem_region(res->start, ATTRIB_SIZE);
2148}
2149
2150static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2151{
2152        if (SMC_CAN_USE_DATACS) {
2153                struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2154                struct smc_local *lp = netdev_priv(ndev);
2155
2156                if (!res)
2157                        return;
2158
2159                if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2160                        netdev_info(ndev, "%s: failed to request datacs memory region.\n",
2161                                    CARDNAME);
2162                        return;
2163                }
2164
2165                lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2166        }
2167}
2168
2169static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2170{
2171        if (SMC_CAN_USE_DATACS) {
2172                struct smc_local *lp = netdev_priv(ndev);
2173                struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2174
2175                if (lp->datacs)
2176                        iounmap(lp->datacs);
2177
2178                lp->datacs = NULL;
2179
2180                if (res)
2181                        release_mem_region(res->start, SMC_DATA_EXTENT);
2182        }
2183}
2184
2185#if IS_BUILTIN(CONFIG_OF)
2186static const struct of_device_id smc91x_match[] = {
2187        { .compatible = "smsc,lan91c94", },
2188        { .compatible = "smsc,lan91c111", },
2189        {},
2190};
2191MODULE_DEVICE_TABLE(of, smc91x_match);
2192
2193/**
2194 * of_try_set_control_gpio - configure a gpio if it exists
2195 */
2196static int try_toggle_control_gpio(struct device *dev,
2197                                   struct gpio_desc **desc,
2198                                   const char *name, int index,
2199                                   int value, unsigned int nsdelay)
2200{
2201        struct gpio_desc *gpio = *desc;
2202        int res;
2203
2204        gpio = devm_gpiod_get_index(dev, name, index);
2205        if (IS_ERR(gpio)) {
2206                if (PTR_ERR(gpio) == -ENOENT) {
2207                        *desc = NULL;
2208                        return 0;
2209                }
2210
2211                return PTR_ERR(gpio);
2212        }
2213        res = gpiod_direction_output(gpio, !value);
2214        if (res) {
2215                dev_err(dev, "unable to toggle gpio %s: %i\n", name, res);
2216                devm_gpiod_put(dev, gpio);
2217                gpio = NULL;
2218                return res;
2219        }
2220        if (nsdelay)
2221                usleep_range(nsdelay, 2 * nsdelay);
2222        gpiod_set_value_cansleep(gpio, value);
2223        *desc = gpio;
2224
2225        return 0;
2226}
2227#endif
2228
2229/*
2230 * smc_init(void)
2231 *   Input parameters:
2232 *      dev->base_addr == 0, try to find all possible locations
2233 *      dev->base_addr > 0x1ff, this is the address to check
2234 *      dev->base_addr == <anything else>, return failure code
2235 *
2236 *   Output:
2237 *      0 --> there is a device
2238 *      anything else, error
2239 */
2240static int smc_drv_probe(struct platform_device *pdev)
2241{
2242        struct smc91x_platdata *pd = dev_get_platdata(&pdev->dev);
2243        const struct of_device_id *match = NULL;
2244        struct smc_local *lp;
2245        struct net_device *ndev;
2246        struct resource *res;
2247        unsigned int __iomem *addr;
2248        unsigned long irq_flags = SMC_IRQ_FLAGS;
2249        unsigned long irq_resflags;
2250        int ret;
2251
2252        ndev = alloc_etherdev(sizeof(struct smc_local));
2253        if (!ndev) {
2254                ret = -ENOMEM;
2255                goto out;
2256        }
2257        SET_NETDEV_DEV(ndev, &pdev->dev);
2258
2259        /* get configuration from platform data, only allow use of
2260         * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2261         */
2262
2263        lp = netdev_priv(ndev);
2264        lp->cfg.flags = 0;
2265
2266        if (pd) {
2267                memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2268                lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2269        }
2270
2271#if IS_BUILTIN(CONFIG_OF)
2272        match = of_match_device(of_match_ptr(smc91x_match), &pdev->dev);
2273        if (match) {
2274                struct device_node *np = pdev->dev.of_node;
2275                u32 val;
2276
2277                /* Optional pwrdwn GPIO configured? */
2278                ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2279                                              "power", 0, 0, 100);
2280                if (ret)
2281                        return ret;
2282
2283                /*
2284                 * Optional reset GPIO configured? Minimum 100 ns reset needed
2285                 * according to LAN91C96 datasheet page 14.
2286                 */
2287                ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2288                                              "reset", 0, 0, 100);
2289                if (ret)
2290                        return ret;
2291
2292                /*
2293                 * Need to wait for optional EEPROM to load, max 750 us according
2294                 * to LAN91C96 datasheet page 55.
2295                 */
2296                if (lp->reset_gpio)
2297                        usleep_range(750, 1000);
2298
2299                /* Combination of IO widths supported, default to 16-bit */
2300                if (!of_property_read_u32(np, "reg-io-width", &val)) {
2301                        if (val & 1)
2302                                lp->cfg.flags |= SMC91X_USE_8BIT;
2303                        if ((val == 0) || (val & 2))
2304                                lp->cfg.flags |= SMC91X_USE_16BIT;
2305                        if (val & 4)
2306                                lp->cfg.flags |= SMC91X_USE_32BIT;
2307                } else {
2308                        lp->cfg.flags |= SMC91X_USE_16BIT;
2309                }
2310        }
2311#endif
2312
2313        if (!pd && !match) {
2314                lp->cfg.flags |= (SMC_CAN_USE_8BIT)  ? SMC91X_USE_8BIT  : 0;
2315                lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2316                lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2317                lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2318        }
2319
2320        if (!lp->cfg.leda && !lp->cfg.ledb) {
2321                lp->cfg.leda = RPC_LSA_DEFAULT;
2322                lp->cfg.ledb = RPC_LSB_DEFAULT;
2323        }
2324
2325        ndev->dma = (unsigned char)-1;
2326
2327        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2328        if (!res)
2329                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2330        if (!res) {
2331                ret = -ENODEV;
2332                goto out_free_netdev;
2333        }
2334
2335
2336        if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2337                ret = -EBUSY;
2338                goto out_free_netdev;
2339        }
2340
2341        ndev->irq = platform_get_irq(pdev, 0);
2342        if (ndev->irq <= 0) {
2343                ret = -ENODEV;
2344                goto out_release_io;
2345        }
2346        /*
2347         * If this platform does not specify any special irqflags, or if
2348         * the resource supplies a trigger, override the irqflags with
2349         * the trigger flags from the resource.
2350         */
2351        irq_resflags = irqd_get_trigger_type(irq_get_irq_data(ndev->irq));
2352        if (irq_flags == -1 || irq_resflags & IRQF_TRIGGER_MASK)
2353                irq_flags = irq_resflags & IRQF_TRIGGER_MASK;
2354
2355        ret = smc_request_attrib(pdev, ndev);
2356        if (ret)
2357                goto out_release_io;
2358#if defined(CONFIG_SA1100_ASSABET)
2359        neponset_ncr_set(NCR_ENET_OSC_EN);
2360#endif
2361        platform_set_drvdata(pdev, ndev);
2362        ret = smc_enable_device(pdev);
2363        if (ret)
2364                goto out_release_attrib;
2365
2366        addr = ioremap(res->start, SMC_IO_EXTENT);
2367        if (!addr) {
2368                ret = -ENOMEM;
2369                goto out_release_attrib;
2370        }
2371
2372#ifdef CONFIG_ARCH_PXA
2373        {
2374                struct smc_local *lp = netdev_priv(ndev);
2375                lp->device = &pdev->dev;
2376                lp->physaddr = res->start;
2377        }
2378#endif
2379
2380        ret = smc_probe(ndev, addr, irq_flags);
2381        if (ret != 0)
2382                goto out_iounmap;
2383
2384        smc_request_datacs(pdev, ndev);
2385
2386        return 0;
2387
2388 out_iounmap:
2389        iounmap(addr);
2390 out_release_attrib:
2391        smc_release_attrib(pdev, ndev);
2392 out_release_io:
2393        release_mem_region(res->start, SMC_IO_EXTENT);
2394 out_free_netdev:
2395        free_netdev(ndev);
2396 out:
2397        pr_info("%s: not found (%d).\n", CARDNAME, ret);
2398
2399        return ret;
2400}
2401
2402static int smc_drv_remove(struct platform_device *pdev)
2403{
2404        struct net_device *ndev = platform_get_drvdata(pdev);
2405        struct smc_local *lp = netdev_priv(ndev);
2406        struct resource *res;
2407
2408        unregister_netdev(ndev);
2409
2410        free_irq(ndev->irq, ndev);
2411
2412#ifdef CONFIG_ARCH_PXA
2413        if (ndev->dma != (unsigned char)-1)
2414                pxa_free_dma(ndev->dma);
2415#endif
2416        iounmap(lp->base);
2417
2418        smc_release_datacs(pdev,ndev);
2419        smc_release_attrib(pdev,ndev);
2420
2421        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2422        if (!res)
2423                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2424        release_mem_region(res->start, SMC_IO_EXTENT);
2425
2426        free_netdev(ndev);
2427
2428        return 0;
2429}
2430
2431static int smc_drv_suspend(struct device *dev)
2432{
2433        struct platform_device *pdev = to_platform_device(dev);
2434        struct net_device *ndev = platform_get_drvdata(pdev);
2435
2436        if (ndev) {
2437                if (netif_running(ndev)) {
2438                        netif_device_detach(ndev);
2439                        smc_shutdown(ndev);
2440                        smc_phy_powerdown(ndev);
2441                }
2442        }
2443        return 0;
2444}
2445
2446static int smc_drv_resume(struct device *dev)
2447{
2448        struct platform_device *pdev = to_platform_device(dev);
2449        struct net_device *ndev = platform_get_drvdata(pdev);
2450
2451        if (ndev) {
2452                struct smc_local *lp = netdev_priv(ndev);
2453                smc_enable_device(pdev);
2454                if (netif_running(ndev)) {
2455                        smc_reset(ndev);
2456                        smc_enable(ndev);
2457                        if (lp->phy_type != 0)
2458                                smc_phy_configure(&lp->phy_configure);
2459                        netif_device_attach(ndev);
2460                }
2461        }
2462        return 0;
2463}
2464
2465static struct dev_pm_ops smc_drv_pm_ops = {
2466        .suspend        = smc_drv_suspend,
2467        .resume         = smc_drv_resume,
2468};
2469
2470static struct platform_driver smc_driver = {
2471        .probe          = smc_drv_probe,
2472        .remove         = smc_drv_remove,
2473        .driver         = {
2474                .name   = CARDNAME,
2475                .owner  = THIS_MODULE,
2476                .pm     = &smc_drv_pm_ops,
2477                .of_match_table = of_match_ptr(smc91x_match),
2478        },
2479};
2480
2481module_platform_driver(smc_driver);
Note: See TracBrowser for help on using the repository browser.