source: src/linux/universal/linux-3.2/arch/mips/lantiq/xway/gpio_stp.c @ 18225

Last change on this file since 18225 was 18225, checked in by BrainSlayer, 16 months ago

arch code

File size: 3.9 KB
Line 
1/*
2 *  This program is free software; you can redistribute it and/or modify it
3 *  under the terms of the GNU General Public License version 2 as published
4 *  by the Free Software Foundation.
5 *
6 *  Copyright (C) 2007 John Crispin <blogic@openwrt.org>
7 *
8 */
9
10#include <linux/slab.h>
11#include <linux/init.h>
12#include <linux/export.h>
13#include <linux/types.h>
14#include <linux/platform_device.h>
15#include <linux/mutex.h>
16#include <linux/io.h>
17#include <linux/gpio.h>
18
19#include <lantiq_soc.h>
20
21#define LTQ_STP_CON0            0x00
22#define LTQ_STP_CON1            0x04
23#define LTQ_STP_CPU0            0x08
24#define LTQ_STP_CPU1            0x0C
25#define LTQ_STP_AR              0x10
26
27#define LTQ_STP_CON_SWU         (1 << 31)
28#define LTQ_STP_2HZ             0
29#define LTQ_STP_4HZ             (1 << 23)
30#define LTQ_STP_8HZ             (2 << 23)
31#define LTQ_STP_10HZ            (3 << 23)
32#define LTQ_STP_SPEED_MASK      (0xf << 23)
33#define LTQ_STP_UPD_FPI         (1 << 31)
34#define LTQ_STP_UPD_MASK        (3 << 30)
35#define LTQ_STP_ADSL_SRC        (3 << 24)
36
37#define LTQ_STP_GROUP0          (1 << 0)
38#define LTQ_STP_GROUP1          (1 << 1)
39#define LTQ_STP_GROUP2          (1 << 2)
40
41#define LTQ_STP_RISING          0
42#define LTQ_STP_FALLING         (1 << 26)
43#define LTQ_STP_EDGE_MASK       (1 << 26)
44
45#define ltq_stp_r32(reg)        __raw_readl(ltq_stp_membase + reg)
46#define ltq_stp_w32(val, reg)   __raw_writel(val, ltq_stp_membase + reg)
47#define ltq_stp_w32_mask(clear, set, reg) \
48                ltq_w32((ltq_r32(ltq_stp_membase + reg) & ~(clear)) | (set), \
49                ltq_stp_membase + (reg))
50
51static int ltq_stp_shadow = 0xffff;
52static void __iomem *ltq_stp_membase;
53
54static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value)
55{
56        if (value)
57                ltq_stp_shadow |= (1 << offset);
58        else
59                ltq_stp_shadow &= ~(1 << offset);
60        ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0);
61}
62
63static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset,
64        int value)
65{
66        ltq_stp_set(chip, offset, value);
67
68        return 0;
69}
70
71static struct gpio_chip ltq_stp_chip = {
72        .label = "ltq_stp",
73        .direction_output = ltq_stp_direction_output,
74        .set = ltq_stp_set,
75        .base = 200,
76        .ngpio = 24,
77        .owner = THIS_MODULE,
78};
79
80static int ltq_stp_hw_init(void)
81{
82        /* the 3 pins used to control the external stp */
83        ltq_gpio_request(4, 1, 0, 1, "stp-st");
84        ltq_gpio_request(5, 1, 0, 1, "stp-d");
85        ltq_gpio_request(6, 1, 0, 1, "stp-sh");
86
87        /* sane defaults */
88        ltq_stp_w32(0, LTQ_STP_AR);
89        ltq_stp_w32(0, LTQ_STP_CPU0);
90        ltq_stp_w32(0, LTQ_STP_CPU1);
91        ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0);
92        ltq_stp_w32(0, LTQ_STP_CON1);
93
94        /* rising or falling edge */
95        ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0);
96
97        /* enable all three led groups */
98        ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2,
99                LTQ_STP_CON1);
100
101        /* stp are update periodically by the FPI bus */
102        ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);
103
104        /* set stp update speed */
105        ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1);
106
107        /* tell the hardware that pin (led) 0 and 1 are controlled
108         *  by the dsl arc
109         */
110        ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0);
111
112        ltq_pmu_enable(PMU_LED);
113        return 0;
114}
115
116static int __devinit ltq_stp_probe(struct platform_device *pdev)
117{
118        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
119        int ret = 0;
120
121        if (!res)
122                return -ENOENT;
123        res = devm_request_mem_region(&pdev->dev, res->start,
124                resource_size(res), dev_name(&pdev->dev));
125        if (!res) {
126                dev_err(&pdev->dev, "failed to request STP memory\n");
127                return -EBUSY;
128        }
129        ltq_stp_membase = devm_ioremap_nocache(&pdev->dev, res->start,
130                resource_size(res));
131        if (!ltq_stp_membase) {
132                dev_err(&pdev->dev, "failed to remap STP memory\n");
133                return -ENOMEM;
134        }
135        ret = gpiochip_add(&ltq_stp_chip);
136        if (!ret)
137                ret = ltq_stp_hw_init();
138
139        return ret;
140}
141
142static struct platform_driver ltq_stp_driver = {
143        .probe = ltq_stp_probe,
144        .driver = {
145                .name = "ltq_stp",
146                .owner = THIS_MODULE,
147        },
148};
149
150int __init ltq_stp_init(void)
151{
152        int ret = platform_driver_register(&ltq_stp_driver);
153
154        if (ret)
155                pr_info("ltq_stp: error registering platfom driver");
156        return ret;
157}
158
159postcore_initcall(ltq_stp_init);
Note: See TracBrowser for help on using the repository browser.