| 1 | /* |
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| 2 | * This program is free software; you can redistribute it and/or modify it |
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| 3 | * under the terms of the GNU General Public License version 2 as published |
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| 4 | * by the Free Software Foundation. |
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| 5 | * |
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| 6 | * Copyright (C) 2007 John Crispin <blogic@openwrt.org> |
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| 7 | * |
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| 8 | */ |
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| 9 | |
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| 10 | #include <linux/slab.h> |
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| 11 | #include <linux/init.h> |
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| 12 | #include <linux/export.h> |
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| 13 | #include <linux/types.h> |
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| 14 | #include <linux/platform_device.h> |
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| 15 | #include <linux/mutex.h> |
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| 16 | #include <linux/io.h> |
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| 17 | #include <linux/gpio.h> |
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| 18 | |
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| 19 | #include <lantiq_soc.h> |
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| 20 | |
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| 21 | #define LTQ_STP_CON0 0x00 |
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| 22 | #define LTQ_STP_CON1 0x04 |
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| 23 | #define LTQ_STP_CPU0 0x08 |
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| 24 | #define LTQ_STP_CPU1 0x0C |
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| 25 | #define LTQ_STP_AR 0x10 |
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| 26 | |
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| 27 | #define LTQ_STP_CON_SWU (1 << 31) |
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| 28 | #define LTQ_STP_2HZ 0 |
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| 29 | #define LTQ_STP_4HZ (1 << 23) |
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| 30 | #define LTQ_STP_8HZ (2 << 23) |
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| 31 | #define LTQ_STP_10HZ (3 << 23) |
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| 32 | #define LTQ_STP_SPEED_MASK (0xf << 23) |
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| 33 | #define LTQ_STP_UPD_FPI (1 << 31) |
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| 34 | #define LTQ_STP_UPD_MASK (3 << 30) |
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| 35 | #define LTQ_STP_ADSL_SRC (3 << 24) |
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| 36 | |
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| 37 | #define LTQ_STP_GROUP0 (1 << 0) |
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| 38 | #define LTQ_STP_GROUP1 (1 << 1) |
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| 39 | #define LTQ_STP_GROUP2 (1 << 2) |
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| 40 | |
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| 41 | #define LTQ_STP_RISING 0 |
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| 42 | #define LTQ_STP_FALLING (1 << 26) |
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| 43 | #define LTQ_STP_EDGE_MASK (1 << 26) |
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| 44 | |
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| 45 | #define ltq_stp_r32(reg) __raw_readl(ltq_stp_membase + reg) |
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| 46 | #define ltq_stp_w32(val, reg) __raw_writel(val, ltq_stp_membase + reg) |
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| 47 | #define ltq_stp_w32_mask(clear, set, reg) \ |
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| 48 | ltq_w32((ltq_r32(ltq_stp_membase + reg) & ~(clear)) | (set), \ |
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| 49 | ltq_stp_membase + (reg)) |
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| 50 | |
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| 51 | static int ltq_stp_shadow = 0xffff; |
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| 52 | static void __iomem *ltq_stp_membase; |
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| 53 | |
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| 54 | static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value) |
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| 55 | { |
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| 56 | if (value) |
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| 57 | ltq_stp_shadow |= (1 << offset); |
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| 58 | else |
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| 59 | ltq_stp_shadow &= ~(1 << offset); |
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| 60 | ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0); |
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| 61 | } |
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| 62 | |
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| 63 | static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset, |
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| 64 | int value) |
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| 65 | { |
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| 66 | ltq_stp_set(chip, offset, value); |
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| 67 | |
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| 68 | return 0; |
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| 69 | } |
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| 70 | |
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| 71 | static struct gpio_chip ltq_stp_chip = { |
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| 72 | .label = "ltq_stp", |
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| 73 | .direction_output = ltq_stp_direction_output, |
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| 74 | .set = ltq_stp_set, |
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| 75 | .base = 200, |
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| 76 | .ngpio = 24, |
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| 77 | .owner = THIS_MODULE, |
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| 78 | }; |
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| 79 | |
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| 80 | static int ltq_stp_hw_init(void) |
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| 81 | { |
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| 82 | /* the 3 pins used to control the external stp */ |
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| 83 | ltq_gpio_request(4, 1, 0, 1, "stp-st"); |
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| 84 | ltq_gpio_request(5, 1, 0, 1, "stp-d"); |
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| 85 | ltq_gpio_request(6, 1, 0, 1, "stp-sh"); |
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| 86 | |
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| 87 | /* sane defaults */ |
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| 88 | ltq_stp_w32(0, LTQ_STP_AR); |
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| 89 | ltq_stp_w32(0, LTQ_STP_CPU0); |
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| 90 | ltq_stp_w32(0, LTQ_STP_CPU1); |
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| 91 | ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0); |
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| 92 | ltq_stp_w32(0, LTQ_STP_CON1); |
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| 93 | |
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| 94 | /* rising or falling edge */ |
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| 95 | ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0); |
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| 96 | |
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| 97 | /* enable all three led groups */ |
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| 98 | ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2, |
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| 99 | LTQ_STP_CON1); |
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| 100 | |
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| 101 | /* stp are update periodically by the FPI bus */ |
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| 102 | ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); |
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| 103 | |
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| 104 | /* set stp update speed */ |
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| 105 | ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1); |
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| 106 | |
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| 107 | /* tell the hardware that pin (led) 0 and 1 are controlled |
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| 108 | * by the dsl arc |
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| 109 | */ |
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| 110 | ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0); |
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| 111 | |
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| 112 | ltq_pmu_enable(PMU_LED); |
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| 113 | return 0; |
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| 114 | } |
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| 115 | |
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| 116 | static int __devinit ltq_stp_probe(struct platform_device *pdev) |
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| 117 | { |
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| 118 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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| 119 | int ret = 0; |
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| 120 | |
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| 121 | if (!res) |
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| 122 | return -ENOENT; |
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| 123 | res = devm_request_mem_region(&pdev->dev, res->start, |
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| 124 | resource_size(res), dev_name(&pdev->dev)); |
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| 125 | if (!res) { |
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| 126 | dev_err(&pdev->dev, "failed to request STP memory\n"); |
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| 127 | return -EBUSY; |
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| 128 | } |
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| 129 | ltq_stp_membase = devm_ioremap_nocache(&pdev->dev, res->start, |
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| 130 | resource_size(res)); |
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| 131 | if (!ltq_stp_membase) { |
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| 132 | dev_err(&pdev->dev, "failed to remap STP memory\n"); |
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| 133 | return -ENOMEM; |
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| 134 | } |
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| 135 | ret = gpiochip_add(<q_stp_chip); |
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| 136 | if (!ret) |
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| 137 | ret = ltq_stp_hw_init(); |
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| 138 | |
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| 139 | return ret; |
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| 140 | } |
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| 141 | |
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| 142 | static struct platform_driver ltq_stp_driver = { |
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| 143 | .probe = ltq_stp_probe, |
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| 144 | .driver = { |
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| 145 | .name = "ltq_stp", |
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| 146 | .owner = THIS_MODULE, |
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| 147 | }, |
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| 148 | }; |
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| 149 | |
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| 150 | int __init ltq_stp_init(void) |
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| 151 | { |
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| 152 | int ret = platform_driver_register(<q_stp_driver); |
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| 153 | |
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| 154 | if (ret) |
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| 155 | pr_info("ltq_stp: error registering platfom driver"); |
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| 156 | return ret; |
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| 157 | } |
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| 158 | |
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| 159 | postcore_initcall(ltq_stp_init); |
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