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ra_mac.c @ 18367

Last change on this file since 18367 was 18367, checked in by BrainSlayer, 16 months ago
fix crashbug
File size: 19.0 KB

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1	#include <linux/module.h>
2	#include <linux/version.h>
3	#include <linux/kernel.h>
4	#include <linux/sched.h>
5	#include <linux/types.h>
6	#include <linux/fcntl.h>
7	#include <linux/interrupt.h>
8	#include <linux/ptrace.h>
9	#include <linux/ioport.h>
10	#include <linux/in.h>
11	#include <linux/slab.h>
12	#include <linux/string.h>
13	#include <linux/signal.h>
14	#include <linux/irq.h>
15	#include <linux/ctype.h>
16
17	#include <asm/system.h>
18	#include <asm/io.h>
19	#include <asm/bitops.h>
20	#include <asm/io.h>
21	#include <asm/dma.h>
22
23	#include <asm/mipsregs.h> /* for cp0 reg definition */
24	#include <asm/rt2880/surfboardint.h> /* for cp0 reg access, added by bobtseng */
25
26	#include <linux/errno.h>
27	#include <linux/init.h>
28	#include <linux/mca.h>
29
30	#include <linux/netdevice.h>
31	#include <linux/etherdevice.h>
32	#include <linux/skbuff.h>
33
34	#include <linux/init.h>
35	#include <linux/module.h>
36	#include <linux/proc_fs.h>
37	#include <asm/uaccess.h>
38
39
40	#if defined(CONFIG_USER_SNMPD)
41	#include <linux/seq_file.h>
42	#endif
43
44	#include "ra2882ethreg.h"
45	#include "raether.h"
46	#include "ra_mac.h"
47	#include "ra_ethtool.h"
48
49	extern END_DEVICE *ra_ei_local;
50
51
52	#if defined(CONFIG_USER_SNMPD)
53
54	static int ra_snmp_seq_show(struct seq_file seq, void v)
55	{
56	char strprint[100];
57
58	#if !defined(CONFIG_RALINK_RT5350)
59
60	sprintf(strprint, "rx counters: %lu %lu %lu %lu %lu %lu %lu\n", sysRegRead(GDMA_RX_GBCNT0), sysRegRead(GDMA_RX_GPCNT0),sysRegRead(GDMA_RX_OERCNT0), sysRegRead(GDMA_RX_FERCNT0), sysRegRead(GDMA_RX_SERCNT0), sysRegRead(GDMA_RX_LERCNT0), sysRegRead(GDMA_RX_CERCNT0));
61	seq_puts(seq, strprint);
62
63	sprintf(strprint, "fc config: %lu %lu %lu\n", sysRegRead(CDMA_FC_CFG), sysRegRead(GDMA1_FC_CFG), PDMA_FC_CFG, sysRegRead(PDMA_FC_CFG));
64	seq_puts(seq, strprint);
65
66	sprintf(strprint, "scheduler: %lu %lu %lu\n", sysRegRead(GDMA1_SCH_CFG), sysRegRead(GDMA2_SCH_CFG), sysRegRead(PDMA_SCH_CFG));
67	seq_puts(seq, strprint);
68
69	#endif
70	sprintf(strprint, "ports: %lu %lu %lu %lu %lu %lu\n", sysRegRead(PORT0_PKCOUNT), sysRegRead(PORT1_PKCOUNT), sysRegRead(PORT2_PKCOUNT), sysRegRead(PORT3_PKCOUNT), sysRegRead(PORT4_PKCOUNT), sysRegRead(PORT5_PKCOUNT));
71	seq_puts(seq, strprint);
72
73	return 0;
74	}
75
76	static int ra_snmp_seq_open(struct inode inode, struct file file)
77	{
78	return single_open(file, ra_snmp_seq_show, NULL);
79	}
80
81	static const struct file_operations ra_snmp_seq_fops = {
82	.owner = THIS_MODULE,
83	.open = ra_snmp_seq_open,
84	.read = seq_read,
85	.llseek = seq_lseek,
86	.release = single_release,
87	};
88	#endif
89
90
91	#if defined (CONFIG_GIGAPHY) \|\| defined (CONFIG_100PHY) \|\| defined (CONFIG_P5_MAC_TO_PHY_MODE)
92	void enable_auto_negotiate(int ge)
93	{
94	#if defined (CONFIG_RALINK_RT3052) \|\| defined (CONFIG_RALINK_RT3352) \|\| defined (CONFIG_RALINK_RT5350)
95	u32 regValue = sysRegRead(0xb01100C8);
96	#else
97	u32 regValue;
98	regValue = (ge == 2)? sysRegRead(MDIO_CFG2) : sysRegRead(MDIO_CFG);
99	#endif
100
101	regValue &= 0xe0ff7fff; // clear auto polling related field:
102	// (MD_PHY1ADDR & GP1_FRC_EN).
103	regValue \|= 0x20000000; // force to enable MDC/MDIO auto polling.
104
105	#if defined (CONFIG_GE2_RGMII_AN) \|\| defined (CONFIG_GE2_MII_AN)
106	if(ge==2) {
107	regValue \|= (CONFIG_MAC_TO_GIGAPHY_MODE_ADDR2 << 24); // setup PHY address for auto polling.
108	}
109	#endif
110	#if defined (CONFIG_GE1_RGMII_AN) \|\| defined (CONFIG_GE1_MII_AN) \|\| defined (CONFIG_P5_MAC_TO_PHY_MODE)
111	if(ge==1) {
112	regValue \|= (CONFIG_MAC_TO_GIGAPHY_MODE_ADDR << 24); // setup PHY address for auto polling.
113	}
114	#endif
115
116	#if defined (CONFIG_RALINK_RT3052) \|\| defined (CONFIG_RALINK_RT3352) \|\| defined (CONFIG_RALINK_RT5350)
117	sysRegWrite(0xb01100C8, regValue);
118	#else
119	if (ge == 2)
120	sysRegWrite(MDIO_CFG2, regValue);
121	else
122	sysRegWrite(MDIO_CFG, regValue);
123	#endif
124	}
125
126	#endif
127	void ra2880stop(END_DEVICE *ei_local)
128	{
129	unsigned int regValue;
130	printk("ra2880stop()...");
131
132	regValue = sysRegRead(PDMA_GLO_CFG);
133	regValue &= ~(TX_WB_DDONE \| RX_DMA_EN \| TX_DMA_EN);
134	sysRegWrite(PDMA_GLO_CFG, regValue);
135
136	printk("Done\n");
137	// printk("Done0x%x...\n", readreg(PDMA_GLO_CFG));
138	}
139
140	void ei_irq_clear(void)
141	{
142	sysRegWrite(FE_INT_STATUS, 0xFFFFFFFF);
143	}
144
145	void rt2880_gmac_hard_reset(void)
146	{
147	sysRegWrite(RSTCTRL, RALINK_FE_RST);
148	sysRegWrite(RSTCTRL, 0);
149	}
150
151	void ra2880EnableInterrupt()
152	{
153	unsigned int regValue = sysRegRead(FE_INT_ENABLE);
154	RAETH_PRINT("FE_INT_ENABLE -- : 0x%08x\n", regValue);
155	// regValue \|= (RX_DONE_INT0 \| TX_DONE_INT0);
156
157	sysRegWrite(FE_INT_ENABLE, regValue);
158	}
159
160	void ra2880MacAddressSet(MAC_INFO *MACInfo, unsigned char p[6])
161	{
162	unsigned long regValue;
163
164	regValue = (p[0] << 8) \| (p[1]);
165	#if defined (CONFIG_RALINK_RT5350)
166	sysRegWrite(SDM_MAC_ADRH, regValue);
167	printk("MAC_ADRH -- : 0x%08x\n", sysRegRead(SDM_MAC_ADRH));
168	#else
169	sysRegWrite(GDMA1_MAC_ADRH, regValue);
170	printk("MAC_ADRH -- : 0x%08x\n", sysRegRead(GDMA1_MAC_ADRH));
171	#endif
172
173	regValue = (p[2] << 24) \| (p[3] <<16) \| (p[4] << 8) \| p[5];
174	#if defined (CONFIG_RALINK_RT5350)
175	sysRegWrite(SDM_MAC_ADRL, regValue);
176	printk("MAC_ADRL -- : 0x%08x\n", sysRegRead(SDM_MAC_ADRL));
177	#else
178	sysRegWrite(GDMA1_MAC_ADRL, regValue);
179	printk("MAC_ADRL -- : 0x%08x\n", sysRegRead(GDMA1_MAC_ADRL));
180	#endif
181
182	return;
183	}
184
185	#ifdef CONFIG_PSEUDO_SUPPORT
186	void ra2880Mac2AddressSet(MAC_INFO *MACInfo, unsigned char p[6])
187	{
188	unsigned long regValue;
189
190	regValue = (p[0] << 8) \| (p[1]);
191	sysRegWrite(GDMA2_MAC_ADRH, regValue);
192
193	regValue = (p[2] << 24) \| (p[3] <<16) \| (p[4] << 8) \| p[5];
194	sysRegWrite(GDMA2_MAC_ADRL, regValue);
195
196	printk("GDMA2_MAC_ADRH -- : 0x%08x\n", sysRegRead(GDMA2_MAC_ADRH));
197	printk("GDMA2_MAC_ADRL -- : 0x%08x\n", sysRegRead(GDMA2_MAC_ADRL));
198	return;
199	}
200	#endif
201
202	/**
203	* hard_init - Called by raeth_probe to inititialize network device
204	* @dev: device pointer
205	*
206	* ethdev_init initilize dev->priv and set to END_DEVICE structure
207	*
208	*/
209	void hard_init(struct net_device *dev)
210	{
211	END_DEVICE ei_local = (END_DEVICE )netdev_priv(dev);//kmalloc(sizeof(END_DEVICE), GFP_KERNEL);
212	MAC_INFO *macinfo = kmalloc(sizeof(MAC_INFO), GFP_KERNEL);
213
214	memset(macinfo, 0 , sizeof(MAC_INFO));
215
216	macinfo->ivec = dev->irq;
217
218	RAETH_PRINT("debug: dev_raether irq is %d(%s)\n", dev->irq, dev->name);
219	ei_local->MACInfo = macinfo;
220	// dev->priv = (void *)ei_local;
221
222	if ( dev->dev_addr != NULL)
223	ra2880MacAddressSet(macinfo, (void *)(dev->dev_addr));
224	else
225	printk("HWnetInit() failed!!!\n");
226
227	#if defined (CONFIG_ETHTOOL)
228	// init mii structure
229	ei_local->mii_info.dev = dev;
230	ei_local->mii_info.mdio_read = mdio_read;
231	ei_local->mii_info.mdio_write = mdio_write;
232	ei_local->mii_info.phy_id_mask = 0x1f;
233	ei_local->mii_info.reg_num_mask = 0x1f;
234	ei_local->mii_info.supports_gmii = mii_check_gmii_support(&ei_local->mii_info);
235	// TODO: phy_id: 0~4
236	ei_local->mii_info.phy_id = 1;
237	#endif
238	return;
239	}
240
241	#if defined(CONFIG_RAETH_QOS)
242	/*
243	* Routine Name : get_idx(mode, index)
244	* Description: calculate ring usage for tx/rx rings
245	* Mode 1 : Tx Ring
246	* Mode 2 : Rx Ring
247	*/
248	int get_ring_usage(int mode, int i)
249	{
250	unsigned long tx_ctx_idx, tx_dtx_idx, tx_usage;
251	unsigned long rx_calc_idx, rx_drx_idx, rx_usage;
252
253	struct PDMA_rxdesc* rxring;
254	struct PDMA_txdesc* txring;
255
256	extern struct net_device *dev_raether;
257	END_DEVICE *ei_local = netdev_priv(dev_raether);
258
259
260	if (mode == 2 ) {
261	/* cpu point to the next descriptor of rx dma ring */
262	rx_calc_idx = (unsigned long)RX_CALC_IDX0;
263	rx_drx_idx = (unsigned long)RX_DRX_IDX0;
264	rxring = (struct PDMA_rxdesc*)RX_BASE_PTR0;
265
266	rx_usage = (rx_drx_idx - rx_calc_idx -1 + NUM_RX_DESC) % NUM_RX_DESC;
267	if ( rx_calc_idx == rx_drx_idx ) {
268	if ( rxring[rx_drx_idx].rxd_info2.DDONE_bit == 1)
269	tx_usage = NUM_RX_DESC;
270	else
271	tx_usage = 0;
272	}
273	return rx_usage;
274	}
275
276
277	switch (i) {
278	case 0:
279	tx_ctx_idx = (unsigned long)TX_CTX_IDX0;
280	tx_dtx_idx = (unsigned long)TX_DTX_IDX0;
281	txring = ei_local->tx_ring0;
282	break;
283	case 1:
284	tx_ctx_idx = (unsigned long)TX_CTX_IDX1;
285	tx_dtx_idx = (unsigned long)TX_DTX_IDX1;
286	txring = ei_local->tx_ring1;
287	break;
288	case 2:
289	tx_ctx_idx = (unsigned long)TX_CTX_IDX2;
290	tx_dtx_idx = (unsigned long)TX_DTX_IDX2;
291	txring = ei_local->tx_ring2;
292	break;
293	case 3:
294	tx_ctx_idx = (unsigned long)TX_CTX_IDX3;
295	tx_dtx_idx = (unsigned long)TX_DTX_IDX3;
296	txring = ei_local->tx_ring3;
297	break;
298	default:
299	printk("get_tx_idx failed %d %d\n", mode, i);
300	return 0;
301	};
302
303	tx_usage = (tx_ctx_idx - tx_dtx_idx + NUM_TX_DESC) % NUM_TX_DESC;
304	if ( tx_ctx_idx == tx_dtx_idx ) {
305	if ( txring[tx_ctx_idx].txd_info2.DDONE_bit == 1)
306	tx_usage = 0;
307	else
308	tx_usage = NUM_TX_DESC;
309	}
310	return tx_usage;
311
312	}
313
314	void dump_qos()
315	{
316	int usage;
317	int i;
318
319	printk("\n-----Raeth QOS -----\n\n");
320
321	for ( i = 0; i < 4; i++) {
322	usage = get_ring_usage(1,i);
323	printk("Tx Ring%d Usage : %d/%d\n", i, usage, NUM_TX_DESC);
324	}
325
326	usage = get_ring_usage(2,0);
327	printk("RX Usage : %d/%d\n\n", usage, NUM_RX_DESC);
328	#if !defined (CONFIG_RALINK_RT5350)
329	printk("GDMA1_FC_CFG(0x%08x) : 0x%08x\n", GDMA1_FC_CFG, sysRegRead(GDMA1_FC_CFG));
330	printk("GDMA2_FC_CFG(0x%08x) : 0x%08x\n", GDMA2_FC_CFG, sysRegRead(GDMA2_FC_CFG));
331	printk("PDMA_FC_CFG(0x%08x) : 0x%08x\n", PDMA_FC_CFG, sysRegRead(PDMA_FC_CFG));
332	printk("PSE_FQ_CFG(0x%08x) : 0x%08x\n", PSE_FQ_CFG, sysRegRead(PSE_FQ_CFG));
333	#endif
334	printk("\n\nTX_CTX_IDX0 : 0x%08x\n", sysRegRead(TX_CTX_IDX0));
335	printk("TX_DTX_IDX0 : 0x%08x\n", sysRegRead(TX_DTX_IDX0));
336	printk("TX_CTX_IDX1 : 0x%08x\n", sysRegRead(TX_CTX_IDX1));
337	printk("TX_DTX_IDX1 : 0x%08x\n", sysRegRead(TX_DTX_IDX1));
338	printk("TX_CTX_IDX2 : 0x%08x\n", sysRegRead(TX_CTX_IDX2));
339	printk("TX_DTX_IDX2 : 0x%08x\n", sysRegRead(TX_DTX_IDX2));
340	printk("TX_CTX_IDX3 : 0x%08x\n", sysRegRead(TX_CTX_IDX3));
341	printk("TX_DTX_IDX3 : 0x%08x\n", sysRegRead(TX_DTX_IDX3));
342	printk("RX_CALC_IDX0 : 0x%08x\n", sysRegRead(RX_CALC_IDX0));
343	printk("RX_DRX_IDX0 : 0x%08x\n", sysRegRead(RX_DRX_IDX0));
344	#if 0
345	for(i=0;i<4;i++){
346	printk("free_idx[%d] = %d\n", i, ra_ei_local->free_idx[i]);
347	}
348	{
349	int j, x, y;
350	struct PDMA_txdesc *tx_desc;
351	for(i=0;i<4;i++){
352
353	switch ( i) {
354	case 0:
355	tx_desc = ra_ei_local->tx_ring0;
356	break;
357	case 1:
358	tx_desc = ra_ei_local->tx_ring1;
359	break;
360	case 2:
361	tx_desc = ra_ei_local->tx_ring2;
362	break;
363	case 3:
364	tx_desc = ra_ei_local->tx_ring3;
365	break;
366	default:
367	printk("ring_no input error... %d\n", i);
368	return -1;
369	};
370
371
372
373	j = ra_ei_local->free_idx[i];
374	x= ((j-1)+NUM_TX_DESC)%NUM_TX_DESC;
375	y= (j+1)%NUM_TX_DESC;
376	printk("skb_free[%d][%d] = 0x%x\n", i, x, ra_ei_local->skb_free[i][x]);
377	printk("skb_free[%d][%d] = 0x%x\n", i, j, ra_ei_local->skb_free[i][j]);
378	printk("skb_free[%d][%d] = 0x%x\n", i, y, ra_ei_local->skb_free[i][y]);
379	printk("tx_desc[%d][%d].txd_info2=0x%x\n",i, x, tx_desc[x].txd_info2);
380	printk("tx_desc[%d][%d].txd_info2=0x%x\n",i, j, tx_desc[j].txd_info2);
381	printk("tx_desc[%d][%d].txd_info2=0x%x\n",i, y, tx_desc[y].txd_info2);
382	}
383	}
384	#endif
385
386	printk("\n------------------------------\n\n");
387	}
388	#endif
389
390	void dump_reg()
391	{
392	printk("\n\nFE_INT_ENABLE : 0x%08x\n", sysRegRead(FE_INT_ENABLE));
393	printk("DLY_INT_CFG : 0x%08x\n", sysRegRead(DLY_INT_CFG));
394	printk("TX_BASE_PTR0 : 0x%08x\n", sysRegRead(TX_BASE_PTR0));
395	printk("TX_CTX_IDX0 : 0x%08x\n", sysRegRead(TX_CTX_IDX0));
396	printk("TX_DTX_IDX0 : 0x%08x\n", sysRegRead(TX_DTX_IDX0));
397	printk("TX_BASE_PTR1(0x%08x) : 0x%08x\n", TX_BASE_PTR1, sysRegRead(TX_BASE_PTR1));
398	printk("TX_CTX_IDX1(0x%08x) : 0x%08x\n", TX_CTX_IDX1, sysRegRead(TX_CTX_IDX1));
399	printk("TX_DTX_IDX1(0x%08x) : 0x%08x\n", TX_DTX_IDX1, sysRegRead(TX_DTX_IDX1));
400	printk("TX_BASE_PTR2(0x%08x) : 0x%08x\n", TX_BASE_PTR2, sysRegRead(TX_BASE_PTR2));
401	printk("TX_CTX_IDX2(0x%08x) : 0x%08x\n", TX_CTX_IDX2, sysRegRead(TX_CTX_IDX2));
402	printk("TX_DTX_IDX2(0x%08x) : 0x%08x\n", TX_DTX_IDX2, sysRegRead(TX_DTX_IDX2));
403	printk("TX_BASE_PTR3(0x%08x) : 0x%08x\n", TX_BASE_PTR3, sysRegRead(TX_BASE_PTR3));
404	printk("TX_CTX_IDX3(0x%08x) : 0x%08x\n", TX_CTX_IDX3, sysRegRead(TX_CTX_IDX3));
405	printk("TX_DTX_IDX3(0x%08x) : 0x%08x\n", TX_DTX_IDX3, sysRegRead(TX_DTX_IDX3));
406
407	printk("RX_BASE_PTR0 : 0x%08x\n", sysRegRead(RX_BASE_PTR0));
408	printk("RX_MAX_CNT0 : 0x%08x\n", sysRegRead(RX_MAX_CNT0));
409	printk("RX_CALC_IDX0 : 0x%08x\n", sysRegRead(RX_CALC_IDX0));
410	printk("RX_DRX_IDX0 : 0x%08x\n", sysRegRead(RX_DRX_IDX0));
411	#if !defined(CONFIG_RALINK_RT5350)
412	printk("FE_GLO_CFG(0x%08x) : 0x%08x\n", FE_GLO_CFG, sysRegRead(FE_GLO_CFG));
413	printk("MDIO_CFG(0x%08x) : 0x%08x\n", MDIO_CFG, sysRegRead(MDIO_CFG));
414
415	printk("GDMA1_FWD_CFG : 0x%08x\n", sysRegRead(GDMA1_FWD_CFG));
416	printk("GDMA1_SCH_CFG(0x%08x) : 0x%08x\n", GDMA1_SCH_CFG, sysRegRead(GDMA1_SCH_CFG));
417	printk("GDMA2_SCH_CFG(0x%08x) : 0x%08x\n", GDMA2_SCH_CFG, sysRegRead(GDMA2_SCH_CFG));
418	printk("CDMA_FC_CFG(0x%08x) : 0x%08x\n", CDMA_FC_CFG, sysRegRead(CDMA_FC_CFG));
419	printk("GDMA1_FC_CFG(0x%08x) : 0x%08x\n", GDMA1_FC_CFG, sysRegRead(GDMA1_FC_CFG));
420	printk("GDMA1_SHPR_CFG(0x%08x) : 0x%08x\n", GDMA1_SHPR_CFG, sysRegRead(GDMA1_SHPR_CFG));
421	printk("GDMA2_SHPR_CFG(0x%08x) : 0x%08x\n", GDMA2_SHPR_CFG, sysRegRead(GDMA2_SHPR_CFG));
422
423	printk("FE_RST_GL : 0x%08x\n\n", sysRegRead(FE_RST_GL));
424	printk("PSE_IQ_STA(0x%08x) : 0x%08x\n", PSE_IQ_STA, sysRegRead(PSE_IQ_STA));
425	printk("PDMA_FC_CFG(0x%08x) : 0x%08x\n", PDMA_FC_CFG, sysRegRead(PDMA_FC_CFG));
426	#endif
427	printk("PDMA_GLO_CFG : 0x%08x\n", sysRegRead(PDMA_GLO_CFG));
428	printk("PDMA_RST_CFG : 0x%08x\n", sysRegRead(PDMA_RST_CFG));
429
430	printk("CDMA_OQ_STA(0x%08x) : 0x%08x\n", CDMA_OQ_STA, sysRegRead(CDMA_OQ_STA));
431	printk("GDMA1_OQ_STA(0x%08x) : 0x%08x\n",GDMA1_OQ_STA, sysRegRead(GDMA1_OQ_STA));
432	printk("PPE_OQ_STA(0x%08x) : 0x%08x\n", PPE_OQ_STA, sysRegRead(PPE_OQ_STA));
433	printk("PDMA_SCH_CFG(0x%08x) : 0x%08x\n", PDMA_SCH_CFG, sysRegRead(PDMA_SCH_CFG));
434
435	#if !defined(CONFIG_RALINK_RT5350)
436	printk("\n-----\nRX Counters:\n");
437	printk("GDMA_RX_GBCNT0(0x%08x) : 0x%08x\n", GDMA_RX_GBCNT0, sysRegRead(GDMA_RX_GBCNT0));
438	printk("GDMA_RX_GPCNT0(0x%08x) : 0x%08x\n", GDMA_RX_GPCNT0, sysRegRead(GDMA_RX_GPCNT0));
439	printk("GDMA_RX_OERCNT0(0x%08x) : 0x%08x\n", GDMA_RX_OERCNT0, sysRegRead(GDMA_RX_OERCNT0));
440	printk("GDMA_RX_FERCNT0(0x%08x) : 0x%08x\n", GDMA_RX_FERCNT0, sysRegRead(GDMA_RX_FERCNT0));
441	printk("GDMA_RX_SERCNT0(0x%08x) : 0x%08x\n", GDMA_RX_SERCNT0, sysRegRead(GDMA_RX_SERCNT0));
442	printk("GDMA_RX_LERCNT0(0x%08x) : 0x%08x\n", GDMA_RX_LERCNT0, sysRegRead(GDMA_RX_LERCNT0));
443	printk("GDMA_RX_CERCNT0(0x%08x) : 0x%08x\n\n", GDMA_RX_CERCNT0, sysRegRead(GDMA_RX_CERCNT0));
444	#endif
445
446	#if defined (CONFIG_ETHTOOL)
447	// just for debug
448	printk("The current PHY address selected by ethtool is %d\n", get_current_phy_address());
449	#endif
450
451	#if defined (CONFIG_RALINK_RT2883) \|\| defined(CONFIG_RALINK_RT3883)
452	printk("GDMA_RX_FCCNT1(0x%08x) : 0x%08x\n\n", GDMA_RX_FCCNT1, sysRegRead(GDMA_RX_FCCNT1));
453	#endif
454	}
455
456	void dump_cp0(void)
457	{
458	printk("CP0 Register dump --\n");
459	printk("CP0_INDEX\t: 0x%08x\n", read_32bit_cp0_register(CP0_INDEX));
460	printk("CP0_RANDOM\t: 0x%08x\n", read_32bit_cp0_register(CP0_RANDOM));
461	printk("CP0_ENTRYLO0\t: 0x%08x\n", read_32bit_cp0_register(CP0_ENTRYLO0));
462	printk("CP0_ENTRYLO1\t: 0x%08x\n", read_32bit_cp0_register(CP0_ENTRYLO1));
463	printk("CP0_CONF\t: 0x%08x\n", read_32bit_cp0_register(CP0_CONF));
464	printk("CP0_CONTEXT\t: 0x%08x\n", read_32bit_cp0_register(CP0_CONTEXT));
465	printk("CP0_PAGEMASK\t: 0x%08x\n", read_32bit_cp0_register(CP0_PAGEMASK));
466	printk("CP0_WIRED\t: 0x%08x\n", read_32bit_cp0_register(CP0_WIRED));
467	printk("CP0_INFO\t: 0x%08x\n", read_32bit_cp0_register(CP0_INFO));
468	printk("CP0_BADVADDR\t: 0x%08x\n", read_32bit_cp0_register(CP0_BADVADDR));
469	printk("CP0_COUNT\t: 0x%08x\n", read_32bit_cp0_register(CP0_COUNT));
470	printk("CP0_ENTRYHI\t: 0x%08x\n", read_32bit_cp0_register(CP0_ENTRYHI));
471	printk("CP0_COMPARE\t: 0x%08x\n", read_32bit_cp0_register(CP0_COMPARE));
472	printk("CP0_STATUS\t: 0x%08x\n", read_32bit_cp0_register(CP0_STATUS));
473	printk("CP0_CAUSE\t: 0x%08x\n", read_32bit_cp0_register(CP0_CAUSE));
474	printk("CP0_EPC\t: 0x%08x\n", read_32bit_cp0_register(CP0_EPC));
475	printk("CP0_PRID\t: 0x%08x\n", read_32bit_cp0_register(CP0_PRID));
476	printk("CP0_CONFIG\t: 0x%08x\n", read_32bit_cp0_register(CP0_CONFIG));
477	printk("CP0_LLADDR\t: 0x%08x\n", read_32bit_cp0_register(CP0_LLADDR));
478	printk("CP0_WATCHLO\t: 0x%08x\n", read_32bit_cp0_register(CP0_WATCHLO));
479	printk("CP0_WATCHHI\t: 0x%08x\n", read_32bit_cp0_register(CP0_WATCHHI));
480	printk("CP0_XCONTEXT\t: 0x%08x\n", read_32bit_cp0_register(CP0_XCONTEXT));
481	printk("CP0_FRAMEMASK\t: 0x%08x\n", read_32bit_cp0_register(CP0_FRAMEMASK));
482	printk("CP0_DIAGNOSTIC\t: 0x%08x\n", read_32bit_cp0_register(CP0_DIAGNOSTIC));
483	printk("CP0_DEBUG\t: 0x%08x\n", read_32bit_cp0_register(CP0_DEBUG));
484	printk("CP0_DEPC\t: 0x%08x\n", read_32bit_cp0_register(CP0_DEPC));
485	printk("CP0_PERFORMANCE\t: 0x%08x\n", read_32bit_cp0_register(CP0_PERFORMANCE));
486	printk("CP0_ECC\t: 0x%08x\n", read_32bit_cp0_register(CP0_ECC));
487	printk("CP0_CACHEERR\t: 0x%08x\n", read_32bit_cp0_register(CP0_CACHEERR));
488	printk("CP0_TAGLO\t: 0x%08x\n", read_32bit_cp0_register(CP0_TAGLO));
489	printk("CP0_TAGHI\t: 0x%08x\n", read_32bit_cp0_register(CP0_TAGHI));
490	printk("CP0_ERROREPC\t: 0x%08x\n", read_32bit_cp0_register(CP0_ERROREPC));
491	printk("CP0_DESAVE\t: 0x%08x\n\n", read_32bit_cp0_register(CP0_DESAVE));
492	}
493
494	struct proc_dir_entry *procRegDir;
495	static struct proc_dir_entry procGmac, procSysCP0;
496	#if defined(CONFIG_USER_SNMPD)
497	static struct proc_dir_entry *procRaSnmp;
498	#endif
499
500	int RegReadMain(void)
501	{
502	dump_reg();
503	return 0;
504	}
505
506	int CP0RegRead(void)
507	{
508	dump_cp0();
509	return 0;
510	}
511
512	#if defined(CONFIG_RAETH_QOS)
513	static struct proc_dir_entry procRaQOS, procRaFeIntr, *procRaEswIntr;
514	extern uint32_t num_of_rxdone_intr;
515	extern uint32_t num_of_esw_intr;
516
517	int RaQOSRegRead(void)
518	{
519	dump_qos();
520	return 0;
521	}
522	#endif
523
524	#if defined (CONFIG_ETHTOOL)
525	/*
526	* proc write procedure
527	*/
528	#if 0
529	static int change_phyid(struct file file, const char buffer, unsigned long count, void *data)
530	{
531	char buf[32];
532	struct net_device *cur_dev_p;
533	END_DEVICE *ei_local;
534	char if_name[64];
535	unsigned int phy_id;
536
537	if (count > 32)
538	count = 32;
539	memset(buf, 0, 32);
540	if (copy_from_user(buf, buffer, count))
541	return -EFAULT;
542
543	/* determine interface name */
544	strcpy(if_name, DEV_NAME); /* "eth2" by default */
545	if(isalpha(buf[0]))
546	sscanf(buf, "%s %d", if_name, &phy_id);
547	else
548	phy_id = simple_strtol(buf, 0, 10);
549
550	for(cur_dev_p=dev_base; cur_dev_p!=NULL; cur_dev_p=cur_dev_p->next){
551	if (strncmp(cur_dev_p->name, if_name, 4) == 0)
552	break;
553	}
554	if (cur_dev_p == NULL)
555	return -EFAULT;
556
557	#ifdef CONFIG_PSEUDO_SUPPORT
558	/* This may be wrong when more than 2 gmacs */
559	if(!strcmp(cur_dev_p->name, DEV_NAME)){
560	ei_local = cur_dev_p->priv;
561	ei_local->mii_info.phy_id = (unsigned char)phy_id;
562	}else{
563	PSEUDO_ADAPTER *pPseudoAd;
564	pPseudoAd = cur_dev_p->priv;
565	pPseudoAd->mii_info.phy_id = (unsigned char)phy_id;
566	}
567	#else
568	ei_local = cur_dev_p->priv;
569	ei_local->mii_info.phy_id = (unsigned char)phy_id;
570	#endif
571	return count;
572	}
573	#endif
574	#endif
575
576	EXPORT_SYMBOL(procRegDir);

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source: src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/ra_mac.c @ 18367

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