source: src/linux/universal/linux-4.9/Documentation/devicetree/bindings/arm/arch_timer.txt @ 31859

Last change on this file since 31859 was 31859, checked in by brainslayer, 6 weeks ago

kernel update

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1* ARM architected timer
2
3ARM cores may have a per-core architected timer, which provides per-cpu timers,
4or a memory mapped architected timer, which provides up to 8 frames with a
5physical and optional virtual timer per frame.
6
7The per-core architected timer is attached to a GIC to deliver its
8per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
9to deliver its interrupts via SPIs.
10
11** CP15 Timer node properties:
12
13- compatible : Should at least contain one of
14        "arm,armv7-timer"
15        "arm,armv8-timer"
16
17- interrupts : Interrupt list for secure, non-secure, virtual and
18  hypervisor timers, in that order.
19
20- clock-frequency : The frequency of the main counter, in Hz. Should be present
21  only where necessary to work around broken firmware which does not configure
22  CNTFRQ on all CPUs to a uniform correct value. Use of this property is
23  strongly discouraged; fix your firmware unless absolutely impossible.
24
25- always-on : a boolean property. If present, the timer is powered through an
26  always-on power domain, therefore it never loses context.
27
28- fsl,erratum-a008585 : A boolean property. Indicates the presence of
29  QorIQ erratum A-008585, which says that reading the counter is
30  unreliable unless the same value is returned by back-to-back reads.
31  This also affects writes to the tval register, due to the implicit
32  counter read.
33
34** Optional properties:
35
36- arm,cpu-registers-not-fw-configured : Firmware does not initialize
37  any of the generic timer CPU registers, which contain their
38  architecturally-defined reset values. Only supported for 32-bit
39  systems which follow the ARMv7 architected reset values.
40
41- arm,no-tick-in-suspend : The main counter does not tick when the system is in
42  low-power system suspend on some SoCs. This behavior does not match the
43  Architecture Reference Manual's specification that the system counter "must
44  be implemented in an always-on power domain."
45
46
47Example:
48
49        timer {
50                compatible = "arm,cortex-a15-timer",
51                             "arm,armv7-timer";
52                interrupts = <1 13 0xf08>,
53                             <1 14 0xf08>,
54                             <1 11 0xf08>,
55                             <1 10 0xf08>;
56                clock-frequency = <100000000>;
57        };
58
59** Memory mapped timer node properties:
60
61- compatible : Should at least contain "arm,armv7-timer-mem".
62
63- clock-frequency : The frequency of the main counter, in Hz. Should be present
64  only when firmware has not configured the MMIO CNTFRQ registers.
65
66- reg : The control frame base address.
67
68Note that #address-cells, #size-cells, and ranges shall be present to ensure
69the CPU can address a frame's registers.
70
71A timer node has up to 8 frame sub-nodes, each with the following properties:
72
73- frame-number: 0 to 7.
74
75- interrupts : Interrupt list for physical and virtual timers in that order.
76  The virtual timer interrupt is optional.
77
78- reg : The first and second view base addresses in that order. The second view
79  base address is optional.
80
81- status : "disabled" indicates the frame is not available for use. Optional.
82
83Example:
84
85        timer@f0000000 {
86                compatible = "arm,armv7-timer-mem";
87                #address-cells = <1>;
88                #size-cells = <1>;
89                ranges;
90                reg = <0xf0000000 0x1000>;
91                clock-frequency = <50000000>;
92
93                frame@f0001000 {
94                        frame-number = <0>
95                        interrupts = <0 13 0x8>,
96                                     <0 14 0x8>;
97                        reg = <0xf0001000 0x1000>,
98                              <0xf0002000 0x1000>;
99                };
100
101                frame@f0003000 {
102                        frame-number = <1>
103                        interrupts = <0 15 0x8>;
104                        reg = <0xf0003000 0x1000>;
105                        status = "disabled";
106                };
107        };
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