source: src/linux/universal/linux-4.9/arch/xtensa/include/asm/page.h @ 31859

Last change on this file since 31859 was 31859, checked in by brainslayer, 11 days ago

kernel update

File size: 5.7 KB
Line 
1/*
2 * include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2007 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#include <asm/processor.h>
15#include <asm/types.h>
16#include <asm/cache.h>
17#include <platform/hardware.h>
18#include <asm/kmem_layout.h>
19
20/*
21 * PAGE_SHIFT determines the page size
22 */
23
24#define PAGE_SHIFT      12
25#define PAGE_SIZE       (__XTENSA_UL_CONST(1) << PAGE_SHIFT)
26#define PAGE_MASK       (~(PAGE_SIZE-1))
27
28#ifdef CONFIG_MMU
29#define PAGE_OFFSET     XCHAL_KSEG_CACHED_VADDR
30#define PHYS_OFFSET     XCHAL_KSEG_PADDR
31#define MAX_LOW_PFN     (PHYS_PFN(XCHAL_KSEG_PADDR) + \
32                         PHYS_PFN(XCHAL_KSEG_SIZE))
33#else
34#define PAGE_OFFSET     PLATFORM_DEFAULT_MEM_START
35#define PHYS_OFFSET     PLATFORM_DEFAULT_MEM_START
36#define MAX_LOW_PFN     PHYS_PFN(0xfffffffful)
37#endif
38
39#define PGTABLE_START   0x80000000
40
41/*
42 * Cache aliasing:
43 *
44 * If the cache size for one way is greater than the page size, we have to
45 * deal with cache aliasing. The cache index is wider than the page size:
46 *
47 * |    |cache| cache index
48 * | pfn  |off| virtual address
49 * |xxxx:X|zzz|
50 * |    : |   |
51 * | \  / |   |
52 * |trans.|   |
53 * | /  \ |   |
54 * |yyyy:Y|zzz| physical address
55 *
56 * When the page number is translated to the physical page address, the lowest
57 * bit(s) (X) that are part of the cache index are also translated (Y).
58 * If this translation changes bit(s) (X), the cache index is also afected,
59 * thus resulting in a different cache line than before.
60 * The kernel does not provide a mechanism to ensure that the page color
61 * (represented by this bit) remains the same when allocated or when pages
62 * are remapped. When user pages are mapped into kernel space, the color of
63 * the page might also change.
64 *
65 * We use the address space VMALLOC_END ... VMALLOC_END + DCACHE_WAY_SIZE * 2
66 * to temporarily map a patch so we can match the color.
67 */
68
69#if DCACHE_WAY_SIZE > PAGE_SIZE
70# define DCACHE_ALIAS_ORDER     (DCACHE_WAY_SHIFT - PAGE_SHIFT)
71# define DCACHE_ALIAS_MASK      (PAGE_MASK & (DCACHE_WAY_SIZE - 1))
72# define DCACHE_ALIAS(a)        (((a) & DCACHE_ALIAS_MASK) >> PAGE_SHIFT)
73# define DCACHE_ALIAS_EQ(a,b)   ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0)
74#else
75# define DCACHE_ALIAS_ORDER     0
76# define DCACHE_ALIAS(a)        ((void)(a), 0)
77#endif
78#define DCACHE_N_COLORS         (1 << DCACHE_ALIAS_ORDER)
79
80#if ICACHE_WAY_SIZE > PAGE_SIZE
81# define ICACHE_ALIAS_ORDER     (ICACHE_WAY_SHIFT - PAGE_SHIFT)
82# define ICACHE_ALIAS_MASK      (PAGE_MASK & (ICACHE_WAY_SIZE - 1))
83# define ICACHE_ALIAS(a)        (((a) & ICACHE_ALIAS_MASK) >> PAGE_SHIFT)
84# define ICACHE_ALIAS_EQ(a,b)   ((((a) ^ (b)) & ICACHE_ALIAS_MASK) == 0)
85#else
86# define ICACHE_ALIAS_ORDER     0
87#endif
88
89
90#ifdef __ASSEMBLY__
91
92#define __pgprot(x)     (x)
93
94#else
95
96/*
97 * These are used to make use of C type-checking..
98 */
99
100typedef struct { unsigned long pte; } pte_t;            /* page table entry */
101typedef struct { unsigned long pgd; } pgd_t;            /* PGD table entry */
102typedef struct { unsigned long pgprot; } pgprot_t;
103typedef struct page *pgtable_t;
104
105#define pte_val(x)      ((x).pte)
106#define pgd_val(x)      ((x).pgd)
107#define pgprot_val(x)   ((x).pgprot)
108
109#define __pte(x)        ((pte_t) { (x) } )
110#define __pgd(x)        ((pgd_t) { (x) } )
111#define __pgprot(x)     ((pgprot_t) { (x) } )
112
113/*
114 * Pure 2^n version of get_order
115 * Use 'nsau' instructions if supported by the processor or the generic version.
116 */
117
118#if XCHAL_HAVE_NSA
119
120static inline __attribute_const__ int get_order(unsigned long size)
121{
122        int lz;
123        asm ("nsau %0, %1" : "=r" (lz) : "r" ((size - 1) >> PAGE_SHIFT));
124        return 32 - lz;
125}
126
127#else
128
129# include <asm-generic/getorder.h>
130
131#endif
132
133struct page;
134struct vm_area_struct;
135extern void clear_page(void *page);
136extern void copy_page(void *to, void *from);
137
138/*
139 * If we have cache aliasing and writeback caches, we might have to do
140 * some extra work
141 */
142
143#if defined(CONFIG_MMU) && DCACHE_WAY_SIZE > PAGE_SIZE
144extern void clear_page_alias(void *vaddr, unsigned long paddr);
145extern void copy_page_alias(void *to, void *from,
146                            unsigned long to_paddr, unsigned long from_paddr);
147
148#define clear_user_highpage clear_user_highpage
149void clear_user_highpage(struct page *page, unsigned long vaddr);
150#define __HAVE_ARCH_COPY_USER_HIGHPAGE
151void copy_user_highpage(struct page *to, struct page *from,
152                        unsigned long vaddr, struct vm_area_struct *vma);
153#else
154# define clear_user_page(page, vaddr, pg)       clear_page(page)
155# define copy_user_page(to, from, vaddr, pg)    copy_page(to, from)
156#endif
157
158/*
159 * This handles the memory map.  We handle pages at
160 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
161 * These macros are for conversion of kernel address, not user
162 * addresses.
163 */
164
165#define ARCH_PFN_OFFSET         (PHYS_OFFSET >> PAGE_SHIFT)
166
167#ifdef CONFIG_MMU
168static inline unsigned long ___pa(unsigned long va)
169{
170        unsigned long off = va - PAGE_OFFSET;
171
172        if (off >= XCHAL_KSEG_SIZE)
173                off -= XCHAL_KSEG_SIZE;
174
175        return off + PHYS_OFFSET;
176}
177#define __pa(x) ___pa((unsigned long)(x))
178#else
179#define __pa(x) \
180        ((unsigned long) (x) - PAGE_OFFSET + PHYS_OFFSET)
181#endif
182#define __va(x) \
183        ((void *)((unsigned long) (x) - PHYS_OFFSET + PAGE_OFFSET))
184#define pfn_valid(pfn) \
185        ((pfn) >= ARCH_PFN_OFFSET && ((pfn) - ARCH_PFN_OFFSET) < max_mapnr)
186
187#ifdef CONFIG_DISCONTIGMEM
188# error CONFIG_DISCONTIGMEM not supported
189#endif
190
191#define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
192#define page_to_virt(page)      __va(page_to_pfn(page) << PAGE_SHIFT)
193#define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
194#define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
195
196#endif /* __ASSEMBLY__ */
197
198#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
199                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
200
201#include <asm-generic/memory_model.h>
202#endif /* _XTENSA_PAGE_H */
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