source: src/linux/universal/linux-4.9/sound/soc/intel/boards/cht_bsw_rt5645.c @ 31859

Last change on this file since 31859 was 31859, checked in by brainslayer, 3 months ago

kernel update

File size: 13.5 KB
Line 
1/*
2 *  cht-bsw-rt5645.c - ASoc Machine driver for Intel Cherryview-based platforms
3 *                     Cherrytrail and Braswell, with RT5645 codec.
4 *
5 *  Copyright (C) 2015 Intel Corp
6 *  Author: Fang, Yang A <yang.a.fang@intel.com>
7 *              N,Harshapriya <harshapriya.n@intel.com>
8 *  This file is modified from cht_bsw_rt5672.c
9 *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 *  This program is free software; you can redistribute it and/or modify
12 *  it under the terms of the GNU General Public License as published by
13 *  the Free Software Foundation; version 2 of the License.
14 *
15 *  This program is distributed in the hope that it will be useful, but
16 *  WITHOUT ANY WARRANTY; without even the implied warranty of
17 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 *  General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 */
22
23#include <linux/module.h>
24#include <linux/acpi.h>
25#include <linux/platform_device.h>
26#include <linux/slab.h>
27#include <asm/cpu_device_id.h>
28#include <asm/platform_sst_audio.h>
29#include <linux/clk.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
33#include <sound/jack.h>
34#include "../../codecs/rt5645.h"
35#include "../atom/sst-atom-controls.h"
36#include "../common/sst-acpi.h"
37
38#define CHT_PLAT_CLK_3_HZ       19200000
39#define CHT_CODEC_DAI   "rt5645-aif1"
40
41struct cht_acpi_card {
42        char *codec_id;
43        int codec_type;
44        struct snd_soc_card *soc_card;
45};
46
47struct cht_mc_private {
48        struct snd_soc_jack jack;
49        struct cht_acpi_card *acpi_card;
50        char codec_name[16];
51        struct clk *mclk;
52};
53
54static inline struct snd_soc_dai *cht_get_codec_dai(struct snd_soc_card *card)
55{
56        struct snd_soc_pcm_runtime *rtd;
57
58        list_for_each_entry(rtd, &card->rtd_list, list) {
59                if (!strncmp(rtd->codec_dai->name, CHT_CODEC_DAI,
60                             strlen(CHT_CODEC_DAI)))
61                        return rtd->codec_dai;
62        }
63        return NULL;
64}
65
66static int platform_clock_control(struct snd_soc_dapm_widget *w,
67                struct snd_kcontrol *k, int  event)
68{
69        struct snd_soc_dapm_context *dapm = w->dapm;
70        struct snd_soc_card *card = dapm->card;
71        struct snd_soc_dai *codec_dai;
72        struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
73        int ret;
74
75        codec_dai = cht_get_codec_dai(card);
76        if (!codec_dai) {
77                dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
78                return -EIO;
79        }
80
81        if (SND_SOC_DAPM_EVENT_ON(event)) {
82                if (ctx->mclk) {
83                        ret = clk_prepare_enable(ctx->mclk);
84                        if (ret < 0) {
85                                dev_err(card->dev,
86                                        "could not configure MCLK state");
87                                return ret;
88                        }
89                }
90        } else {
91                /* Set codec sysclk source to its internal clock because codec PLL will
92                 * be off when idle and MCLK will also be off when codec is
93                 * runtime suspended. Codec needs clock for jack detection and button
94                 * press. MCLK is turned off with clock framework or ACPI.
95                 */
96                ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK,
97                                        48000 * 512, SND_SOC_CLOCK_IN);
98                if (ret < 0) {
99                        dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
100                        return ret;
101                }
102
103                if (ctx->mclk)
104                        clk_disable_unprepare(ctx->mclk);
105        }
106
107        return 0;
108}
109
110static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
111        SND_SOC_DAPM_HP("Headphone", NULL),
112        SND_SOC_DAPM_MIC("Headset Mic", NULL),
113        SND_SOC_DAPM_MIC("Int Mic", NULL),
114        SND_SOC_DAPM_SPK("Ext Spk", NULL),
115        SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
116                        platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
117};
118
119static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = {
120        {"IN1P", NULL, "Headset Mic"},
121        {"IN1N", NULL, "Headset Mic"},
122        {"DMIC L1", NULL, "Int Mic"},
123        {"DMIC R1", NULL, "Int Mic"},
124        {"Headphone", NULL, "HPOL"},
125        {"Headphone", NULL, "HPOR"},
126        {"Ext Spk", NULL, "SPOL"},
127        {"Ext Spk", NULL, "SPOR"},
128        {"AIF1 Playback", NULL, "ssp2 Tx"},
129        {"ssp2 Tx", NULL, "codec_out0"},
130        {"ssp2 Tx", NULL, "codec_out1"},
131        {"codec_in0", NULL, "ssp2 Rx" },
132        {"codec_in1", NULL, "ssp2 Rx" },
133        {"ssp2 Rx", NULL, "AIF1 Capture"},
134        {"Headphone", NULL, "Platform Clock"},
135        {"Headset Mic", NULL, "Platform Clock"},
136        {"Int Mic", NULL, "Platform Clock"},
137        {"Ext Spk", NULL, "Platform Clock"},
138};
139
140static const struct snd_soc_dapm_route cht_rt5650_audio_map[] = {
141        {"IN1P", NULL, "Headset Mic"},
142        {"IN1N", NULL, "Headset Mic"},
143        {"DMIC L2", NULL, "Int Mic"},
144        {"DMIC R2", NULL, "Int Mic"},
145        {"Headphone", NULL, "HPOL"},
146        {"Headphone", NULL, "HPOR"},
147        {"Ext Spk", NULL, "SPOL"},
148        {"Ext Spk", NULL, "SPOR"},
149        {"AIF1 Playback", NULL, "ssp2 Tx"},
150        {"ssp2 Tx", NULL, "codec_out0"},
151        {"ssp2 Tx", NULL, "codec_out1"},
152        {"codec_in0", NULL, "ssp2 Rx" },
153        {"codec_in1", NULL, "ssp2 Rx" },
154        {"ssp2 Rx", NULL, "AIF1 Capture"},
155        {"Headphone", NULL, "Platform Clock"},
156        {"Headset Mic", NULL, "Platform Clock"},
157        {"Int Mic", NULL, "Platform Clock"},
158        {"Ext Spk", NULL, "Platform Clock"},
159};
160
161static const struct snd_kcontrol_new cht_mc_controls[] = {
162        SOC_DAPM_PIN_SWITCH("Headphone"),
163        SOC_DAPM_PIN_SWITCH("Headset Mic"),
164        SOC_DAPM_PIN_SWITCH("Int Mic"),
165        SOC_DAPM_PIN_SWITCH("Ext Spk"),
166};
167
168static struct snd_soc_jack_pin cht_bsw_jack_pins[] = {
169        {
170                .pin    = "Headphone",
171                .mask   = SND_JACK_HEADPHONE,
172        },
173        {
174                .pin    = "Headset Mic",
175                .mask   = SND_JACK_MICROPHONE,
176        },
177};
178
179static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
180                             struct snd_pcm_hw_params *params)
181{
182        struct snd_soc_pcm_runtime *rtd = substream->private_data;
183        struct snd_soc_dai *codec_dai = rtd->codec_dai;
184        int ret;
185
186        /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
187        ret = snd_soc_dai_set_pll(codec_dai, 0, RT5645_PLL1_S_MCLK,
188                                  CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
189        if (ret < 0) {
190                dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
191                return ret;
192        }
193
194        ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_PLL1,
195                                params_rate(params) * 512, SND_SOC_CLOCK_IN);
196        if (ret < 0) {
197                dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
198                return ret;
199        }
200
201        return 0;
202}
203
204static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
205{
206        int ret;
207        int jack_type;
208        struct snd_soc_codec *codec = runtime->codec;
209        struct snd_soc_dai *codec_dai = runtime->codec_dai;
210        struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
211
212        /* Select clk_i2s1_asrc as ASRC clock source */
213        rt5645_sel_asrc_clk_src(codec,
214                                RT5645_DA_STEREO_FILTER |
215                                RT5645_DA_MONO_L_FILTER |
216                                RT5645_DA_MONO_R_FILTER |
217                                RT5645_AD_STEREO_FILTER,
218                                RT5645_CLK_SEL_I2S1_ASRC);
219
220        /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
221        ret = snd_soc_dai_set_tdm_slot(codec_dai, 0xF, 0xF, 4, 24);
222        if (ret < 0) {
223                dev_err(runtime->dev, "can't set codec TDM slot %d\n", ret);
224                return ret;
225        }
226
227        if (ctx->acpi_card->codec_type == CODEC_TYPE_RT5650)
228                jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
229                                        SND_JACK_BTN_0 | SND_JACK_BTN_1 |
230                                        SND_JACK_BTN_2 | SND_JACK_BTN_3;
231        else
232                jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
233
234        ret = snd_soc_card_jack_new(runtime->card, "Headset",
235                                    jack_type, &ctx->jack,
236                                    cht_bsw_jack_pins, ARRAY_SIZE(cht_bsw_jack_pins));
237        if (ret) {
238                dev_err(runtime->dev, "Headset jack creation failed %d\n", ret);
239                return ret;
240        }
241
242        rt5645_set_jack_detect(codec, &ctx->jack, &ctx->jack, &ctx->jack);
243
244        if (ctx->mclk) {
245                /*
246                 * The firmware might enable the clock at
247                 * boot (this information may or may not
248                 * be reflected in the enable clock register).
249                 * To change the rate we must disable the clock
250                 * first to cover these cases. Due to common
251                 * clock framework restrictions that do not allow
252                 * to disable a clock that has not been enabled,
253                 * we need to enable the clock first.
254                 */
255                ret = clk_prepare_enable(ctx->mclk);
256                if (!ret)
257                        clk_disable_unprepare(ctx->mclk);
258
259                ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
260
261                if (ret)
262                        dev_err(runtime->dev, "unable to set MCLK rate\n");
263        }
264        return ret;
265}
266
267static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
268                            struct snd_pcm_hw_params *params)
269{
270        struct snd_interval *rate = hw_param_interval(params,
271                        SNDRV_PCM_HW_PARAM_RATE);
272        struct snd_interval *channels = hw_param_interval(params,
273                                                SNDRV_PCM_HW_PARAM_CHANNELS);
274
275        /* The DSP will covert the FE rate to 48k, stereo, 24bits */
276        rate->min = rate->max = 48000;
277        channels->min = channels->max = 2;
278
279        /* set SSP2 to 24-bit */
280        params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
281        return 0;
282}
283
284static int cht_aif1_startup(struct snd_pcm_substream *substream)
285{
286        return snd_pcm_hw_constraint_single(substream->runtime,
287                        SNDRV_PCM_HW_PARAM_RATE, 48000);
288}
289
290static struct snd_soc_ops cht_aif1_ops = {
291        .startup = cht_aif1_startup,
292};
293
294static struct snd_soc_ops cht_be_ssp2_ops = {
295        .hw_params = cht_aif1_hw_params,
296};
297
298static struct snd_soc_dai_link cht_dailink[] = {
299        [MERR_DPCM_AUDIO] = {
300                .name = "Audio Port",
301                .stream_name = "Audio",
302                .cpu_dai_name = "media-cpu-dai",
303                .codec_dai_name = "snd-soc-dummy-dai",
304                .codec_name = "snd-soc-dummy",
305                .platform_name = "sst-mfld-platform",
306                .nonatomic = true,
307                .dynamic = 1,
308                .dpcm_playback = 1,
309                .dpcm_capture = 1,
310                .ops = &cht_aif1_ops,
311        },
312        [MERR_DPCM_DEEP_BUFFER] = {
313                .name = "Deep-Buffer Audio Port",
314                .stream_name = "Deep-Buffer Audio",
315                .cpu_dai_name = "deepbuffer-cpu-dai",
316                .codec_dai_name = "snd-soc-dummy-dai",
317                .codec_name = "snd-soc-dummy",
318                .platform_name = "sst-mfld-platform",
319                .nonatomic = true,
320                .dynamic = 1,
321                .dpcm_playback = 1,
322                .ops = &cht_aif1_ops,
323        },
324        [MERR_DPCM_COMPR] = {
325                .name = "Compressed Port",
326                .stream_name = "Compress",
327                .cpu_dai_name = "compress-cpu-dai",
328                .codec_dai_name = "snd-soc-dummy-dai",
329                .codec_name = "snd-soc-dummy",
330                .platform_name = "sst-mfld-platform",
331        },
332        /* CODEC<->CODEC link */
333        /* back ends */
334        {
335                .name = "SSP2-Codec",
336                .id = 1,
337                .cpu_dai_name = "ssp2-port",
338                .platform_name = "sst-mfld-platform",
339                .no_pcm = 1,
340                .codec_dai_name = "rt5645-aif1",
341                .codec_name = "i2c-10EC5645:00",
342                .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF
343                                        | SND_SOC_DAIFMT_CBS_CFS,
344                .init = cht_codec_init,
345                .be_hw_params_fixup = cht_codec_fixup,
346                .nonatomic = true,
347                .dpcm_playback = 1,
348                .dpcm_capture = 1,
349                .ops = &cht_be_ssp2_ops,
350        },
351};
352
353/* SoC card */
354static struct snd_soc_card snd_soc_card_chtrt5645 = {
355        .name = "chtrt5645",
356        .owner = THIS_MODULE,
357        .dai_link = cht_dailink,
358        .num_links = ARRAY_SIZE(cht_dailink),
359        .dapm_widgets = cht_dapm_widgets,
360        .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
361        .dapm_routes = cht_rt5645_audio_map,
362        .num_dapm_routes = ARRAY_SIZE(cht_rt5645_audio_map),
363        .controls = cht_mc_controls,
364        .num_controls = ARRAY_SIZE(cht_mc_controls),
365};
366
367static struct snd_soc_card snd_soc_card_chtrt5650 = {
368        .name = "chtrt5650",
369        .owner = THIS_MODULE,
370        .dai_link = cht_dailink,
371        .num_links = ARRAY_SIZE(cht_dailink),
372        .dapm_widgets = cht_dapm_widgets,
373        .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
374        .dapm_routes = cht_rt5650_audio_map,
375        .num_dapm_routes = ARRAY_SIZE(cht_rt5650_audio_map),
376        .controls = cht_mc_controls,
377        .num_controls = ARRAY_SIZE(cht_mc_controls),
378};
379
380static struct cht_acpi_card snd_soc_cards[] = {
381        {"10EC5640", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
382        {"10EC5645", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
383        {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650},
384};
385
386static char cht_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
387
388static bool is_valleyview(void)
389{
390        static const struct x86_cpu_id cpu_ids[] = {
391                { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
392                {}
393        };
394
395        if (!x86_match_cpu(cpu_ids))
396                return false;
397        return true;
398}
399
400static int snd_cht_mc_probe(struct platform_device *pdev)
401{
402        int ret_val = 0;
403        int i;
404        struct cht_mc_private *drv;
405        struct snd_soc_card *card = snd_soc_cards[0].soc_card;
406        struct sst_acpi_mach *mach;
407        const char *i2c_name = NULL;
408        int dai_index = 0;
409        bool found = false;
410
411        drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
412        if (!drv)
413                return -ENOMEM;
414
415        mach = (&pdev->dev)->platform_data;
416
417        for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) {
418                if (acpi_dev_found(snd_soc_cards[i].codec_id) &&
419                        (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) {
420                        dev_dbg(&pdev->dev,
421                                "found codec %s\n", snd_soc_cards[i].codec_id);
422                        card = snd_soc_cards[i].soc_card;
423                        drv->acpi_card = &snd_soc_cards[i];
424                        found = true;
425                        break;
426                }
427        }
428
429        if (!found) {
430                dev_err(&pdev->dev, "No matching HID found in supported list\n");
431                return -ENODEV;
432        }
433
434        card->dev = &pdev->dev;
435        sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id);
436
437        /* set correct codec name */
438        for (i = 0; i < ARRAY_SIZE(cht_dailink); i++)
439                if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) {
440                        card->dai_link[i].codec_name = drv->codec_name;
441                        dai_index = i;
442                }
443
444        /* fixup codec name based on HID */
445        i2c_name = sst_acpi_find_name_from_hid(mach->id);
446        if (i2c_name != NULL) {
447                snprintf(cht_rt5640_codec_name, sizeof(cht_rt5640_codec_name),
448                        "%s%s", "i2c-", i2c_name);
449                cht_dailink[dai_index].codec_name = cht_rt5640_codec_name;
450        }
451
452        if (is_valleyview()) {
453                drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
454                if (IS_ERR(drv->mclk)) {
455                        dev_err(&pdev->dev,
456                                "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
457                                PTR_ERR(drv->mclk));
458                        return PTR_ERR(drv->mclk);
459                }
460        }
461
462        snd_soc_card_set_drvdata(card, drv);
463        ret_val = devm_snd_soc_register_card(&pdev->dev, card);
464        if (ret_val) {
465                dev_err(&pdev->dev,
466                        "snd_soc_register_card failed %d\n", ret_val);
467                return ret_val;
468        }
469        platform_set_drvdata(pdev, card);
470        return ret_val;
471}
472
473static struct platform_driver snd_cht_mc_driver = {
474        .driver = {
475                .name = "cht-bsw-rt5645",
476        },
477        .probe = snd_cht_mc_probe,
478};
479
480module_platform_driver(snd_cht_mc_driver)
481
482MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver");
483MODULE_AUTHOR("Fang, Yang A,N,Harshapriya");
484MODULE_LICENSE("GPL v2");
485MODULE_ALIAS("platform:cht-bsw-rt5645");
Note: See TracBrowser for help on using the repository browser.