Changeset 18256

Timestamp:

01/21/12 15:08:15 (16 months ago)

Author:

BrainSlayer

Message:

power up postfix for gigaset sx763

Location:

src/linux/universal/linux-3.2

Files:

• .config_802 (modified) (1 diff)
• .config_803 (modified) (1 diff)
• .config_sx763 (modified) (1 diff)
• drivers/usb/dwc_otg/dwc_otg_ifx.c (modified) (1 diff)

src/linux/universal/linux-3.2/.config_802

@@ -64 +64 @@
 # MIPS Machine
 #
-CONFIG_LANTIQ_MACH_EASY50712=y
+# CONFIG_LANTIQ_MACH_EASY50712 is not set
 CONFIG_LANTIQ_MACH_ARV45XX=y
-CONFIG_LANTIQ_MACH_NETGEAR=y
-CONFIG_LANTIQ_MACH_GIGASX76X=y
-CONFIG_LANTIQ_MACH_WBMR=y
+# CONFIG_LANTIQ_MACH_NETGEAR is not set
+# CONFIG_LANTIQ_MACH_GIGASX76X is not set
+# CONFIG_LANTIQ_MACH_WBMR is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set

src/linux/universal/linux-3.2/.config_803

@@ -64 +64 @@
 # MIPS Machine
 #
-CONFIG_LANTIQ_MACH_EASY50712=y
+# CONFIG_LANTIQ_MACH_EASY50712 is not set
 CONFIG_LANTIQ_MACH_ARV45XX=y
-CONFIG_LANTIQ_MACH_NETGEAR=y
-CONFIG_LANTIQ_MACH_GIGASX76X=y
-CONFIG_LANTIQ_MACH_WBMR=y
+# CONFIG_LANTIQ_MACH_NETGEAR is not set
+# CONFIG_LANTIQ_MACH_GIGASX76X is not set
+# CONFIG_LANTIQ_MACH_WBMR is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set

src/linux/universal/linux-3.2/.config_sx763

@@ -64 +64 @@
 # MIPS Machine
 #
-CONFIG_LANTIQ_MACH_EASY50712=y
-CONFIG_LANTIQ_MACH_ARV45XX=y
-CONFIG_LANTIQ_MACH_NETGEAR=y
+# CONFIG_LANTIQ_MACH_EASY50712 is not set
+# CONFIG_LANTIQ_MACH_ARV45XX is not set
+# CONFIG_LANTIQ_MACH_NETGEAR is not set
 CONFIG_LANTIQ_MACH_GIGASX76X=y
-CONFIG_LANTIQ_MACH_WBMR=y
+# CONFIG_LANTIQ_MACH_WBMR is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set

src/linux/universal/linux-3.2/drivers/usb/dwc_otg/dwc_otg_ifx.c

@@ -67 +67 @@
         writel(readl(DANUBE_PMU_PWDCR) & ~0x40, DANUBE_PMU_PWDCR);
         writel(readl(DANUBE_PMU_PWDCR) & ~0x8000, DANUBE_PMU_PWDCR);
-
+#ifdef CONFIG_LANTIQ_MACH_GIGASX76X
+        writel(0x8b87, IFXMIPS_GPIO_P1_ALTSEL0);
+        writel(0x400, IFXMIPS_GPIO_P1_ALTSEL1);
+        writel(0xf3fc, IFXMIPS_GPIO_P1_OD);
+        writel(0xfb3e, IFXMIPS_GPIO_P1_DIR);
+        writel(0x850, IFXMIPS_GPIO_P1_PUDSEL);
+        writel(readl(IFXMIPS_GPIO_P1_OUT) | (1<<13), IFXMIPS_GPIO_P1_OUT);
+#endif
 #if 1//defined (DWC_HOST_ONLY)
         // make the hardware be a host controller (default)