Changeset 18294

Timestamp:

01/24/12 04:51:45 (16 months ago)

Author:

BrainSlayer

Message:

hornet support (quick and dirty)

Location:

src/linux/universal/linux-3.2

Files:

• .config_hornet (added)
• arch/mips/Kconfig (modified) (1 diff)
• arch/mips/Makefile (modified) (1 diff)
• arch/mips/ar7240/Makefile (modified) (2 diffs)
• arch/mips/ar7240/ar71xx.c (modified) (3 diffs)
• arch/mips/ar7240/dev-ap91-pci.c (modified) (2 diffs)
• arch/mips/ar7240/dev-ar9xxx-wmac.c (added)
• arch/mips/ar7240/dev-ar9xxx-wmac.h (added)
• arch/mips/ar7240/early_printk.c (added)
• arch/mips/ar7240/gpio_driver.c (modified) (3 diffs)
• arch/mips/ar7240/irq.c (modified) (1 diff)
• arch/mips/ar7240/pci-ath9k-fixup.c (modified) (2 diffs)
• arch/mips/ar7240/pci.c (modified) (2 diffs)
• arch/mips/ar7240/platform.c (modified) (6 diffs)
• arch/mips/ar7240/prom.c (modified) (1 diff)
• arch/mips/ar7240/setup.c (modified) (16 diffs)
• arch/mips/include/asm/mach-ar7100/cpu-feature-overri (deleted)
• arch/mips/include/asm/mach-ar7100/kernel-entry-init. (deleted)
• arch/mips/include/asm/mach-ar71xx/ar71xx.h (modified) (1 diff)
• arch/mips/include/asm/mach-ar71xx/ar933x_uart.h (added)
• arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h (added)
• arch/mips/include/asm/mach-ar71xx/cpu-feature-overri (deleted)
• arch/mips/include/asm/mach-ar71xx/kernel-entry-init. (deleted)
• arch/mips/include/asm/mach-ar7240/ar7240.h (modified) (5 diffs)
• arch/mips/include/asm/mach-ar7240/ar933x.h (added)
• arch/mips/include/asm/mach-ar7240/ar934x.h (added)
• arch/mips/include/asm/mach-ar7240/cpu-feature-overri (deleted)
• arch/mips/include/asm/mach-ar7240/kernel-entry-init. (deleted)
• drivers/mtd/devices/Kconfig (modified) (2 diffs)
• drivers/mtd/maps/Makefile (modified) (1 diff)
• drivers/net/ethernet/ag7240/ag7240.c (modified) (9 diffs)
• drivers/net/ethernet/ag7240/ag7240_phy.h (modified) (2 diffs)
• drivers/tty/serial/Kconfig (modified) (1 diff)
• drivers/tty/serial/Makefile (modified) (1 diff)
• drivers/tty/serial/ar933x_uart.c (added)
• drivers/usb/Kconfig (modified) (1 diff)
• drivers/usb/host/ehci-ar71xx.c (modified) (1 diff)
• include/linux/serial_core.h (modified) (1 diff)
• init/main.c (modified) (2 diffs)

src/linux/universal/linux-3.2/arch/mips/Kconfig

@@ -785 +785 @@
           Say Y here if you have a XLR or XLS based board.
 
+config MACH_HORNET
+    bool "Support for Atheros HORNET based board"
+        select DMA_NONCOHERENT
+        select IRQ_CPU
+        select CEVT_R4K
+        select CSRC_R4K
+        select DMA_NONCOHERENT
+        select ARCH_REQUIRE_GPIOLIB
+        select SYS_HAS_CPU_MIPS32_R1
+        select SYS_HAS_CPU_MIPS32_R2
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_HAS_EARLY_PRINTK
+
+config HORNET_EMULATION
+    bool "build system for Hornet emulation board?"
+    depends on MACH_HORNET
+
 config  MACH_AR7100
     bool "Support for Atheros ar7100 based boards"

src/linux/universal/linux-3.2/arch/mips/Makefile

@@ -187 +187 @@
 endif
 
+#Atheros Ar9330(Hornet)
+#
+core-$(CONFIG_MACH_HORNET)              +=      arch/mips/ar7240/
+load-$(CONFIG_MACH_HORNET)              +=      0xffffffff80002000
+cflags-$(CONFIG_MACH_HORNET)    += -I$(srctree)/arch/mips/include/asm/mach-ar7240
+
+
 #Atheros Ar7240
 #

src/linux/universal/linux-3.2/arch/mips/ar7240/Makefile

@@ -26 +26 @@
                         gpio_driver.o   \
                         dev-leds-gpio.o \
+                        dev-ar9xxx-wmac.o \
                         ar7240.o \
                         ar71xx.o \
@@ -34 +35 @@
                         platform.o
 
+obj-$(CONFIG_EARLY_PRINTK)              += early_printk.o
 #obj-$(CONFIG_AR9100)   += wdt.o
 

src/linux/universal/linux-3.2/arch/mips/ar7240/ar71xx.c

@@ -72 +72 @@
                 break;
 
+        case AR71XX_SOC_AR9330:
+        case AR71XX_SOC_AR9331:
+                spin_lock_irqsave(&ar71xx_device_lock, flags);
+                t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
+                ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t | mask);
+                spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+                break;
+
+        case AR71XX_SOC_AR9341:
+        case AR71XX_SOC_AR9342:
+        case AR71XX_SOC_AR9344:
+                spin_lock_irqsave(&ar71xx_device_lock, flags);
+                t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
+                ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t | mask);
+                spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+                break;
+
         default:
                 BUG();
@@ -113 +130 @@
                 spin_unlock_irqrestore(&ar71xx_device_lock, flags);
                 break;
+        case AR71XX_SOC_AR9330:
+        case AR71XX_SOC_AR9331:
+                spin_lock_irqsave(&ar71xx_device_lock, flags);
+                t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
+                ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t & ~mask);
+                spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+                break;
+
+        case AR71XX_SOC_AR9341:
+        case AR71XX_SOC_AR9342:
+        case AR71XX_SOC_AR9344:
+                spin_lock_irqsave(&ar71xx_device_lock, flags);
+                t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
+                ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t & ~mask);
+                spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+                break;
 
         default:
@@ -149 +182 @@
                 break;
 
+        case AR71XX_SOC_AR9330:
+        case AR71XX_SOC_AR9331:
+                spin_lock_irqsave(&ar71xx_device_lock, flags);
+                t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
+                spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+                break;
+
+        case AR71XX_SOC_AR9341:
+        case AR71XX_SOC_AR9342:
+        case AR71XX_SOC_AR9344:
+                spin_lock_irqsave(&ar71xx_device_lock, flags);
+                t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
+                spin_unlock_irqrestore(&ar71xx_device_lock, flags);
+                break;
+
+
         default:
                 BUG();

src/linux/universal/linux-3.2/arch/mips/ar7240/dev-ap91-pci.c

@@ -8 +8 @@
  *  by the Free Software Foundation.
  */
-
+#ifndef CONFIG_MACH_HORNET
 #include <linux/pci.h>
 #include <linux/ath9k_platform.h>
@@ -70 +70 @@
         pci_enable_ath9k_fixup(0, wmac_data.eeprom_data);
 }
+#endif

src/linux/universal/linux-3.2/arch/mips/ar7240/gpio_driver.c

@@ -327 +327 @@
 
 //wl gpios
-
+#ifndef CONFIG_MACH_HORNET
 
         {
@@ -491 +491 @@
         }, 
 #endif
+#endif
 };
 
+void serial_print(char *fmt, ...);
 
 void __init ar71xx_gpio_init(void)
@@ -502 +504 @@
                 panic("cannot allocate AR71xx GPIO registers page");
 
-        ar71xx_gpio_chip.ngpio = 48;
+        ar71xx_gpio_chip.ngpio = sizeof(generic_leds_gpio)/sizeof(struct gpio_led);
 
         err = gpiochip_add(&ar71xx_gpio_chip);

src/linux/universal/linux-3.2/arch/mips/ar7240/irq.c

@@ -60 +60 @@
 //    setup_irq(AR7240_CPU_IRQ_PCI,   &cascade);
 #endif
-#ifdef CONFIG_WASP_SUPPORT
-        set_irq_chip_and_handler(ATH_CPU_IRQ_WLAN,
+#if defined(CONFIG_WASP_SUPPORT) || defined(CONFIG_MACH_HORNET)
+        irq_set_chip_and_handler(ATH_CPU_IRQ_WLAN,
                                 &dummy_irq_chip,
                                 handle_percpu_irq);

src/linux/universal/linux-3.2/arch/mips/ar7240/pci-ath9k-fixup.c

@@ -8 +8 @@
  *  by the Free Software Foundation.
  */
-
+#ifndef CONFIG_MACH_HORNET
 #include <linux/pci.h>
 #include <linux/delay.h>
@@ -155 +155 @@
         ath9k_num_fixups++;
 }
+#endif

src/linux/universal/linux-3.2/arch/mips/ar7240/pci.c

@@ -19 +19 @@
 #include <asm/mach-ar71xx/pci.h>
 
+#ifndef CONFIG_MACH_HORNET
 unsigned ar71xx_pci_nr_irqs __initdata;
 struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata;
@@ -92 +93 @@
         return ret;
 }
+#endif

src/linux/universal/linux-3.2/arch/mips/ar7240/platform.c

@@ -16 +16 @@
 #include <asm/mach-ar71xx/ar71xx.h>
 #include "nvram.h"
+#include <asm/mach-ar71xx/ar933x_uart_platform.h>
+
+void serial_print(char *fmt, ...);
 
 #ifdef CONFIG_WASP_SUPPORT
@@ -119 +122 @@
 };
 
+
+static struct resource ar933x_uart_resources[] = {
+        {
+                .start  = AR933X_UART_BASE,
+                .end    = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = AR7240_MISC_IRQ_UART,
+                .end    = AR7240_MISC_IRQ_UART,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct ar933x_uart_platform_data ar933x_uart_data;
+static struct platform_device ar933x_uart_device = {
+        .name           = "ar933x-uart",
+        .id             = -1,
+        .resource       = ar933x_uart_resources,
+        .num_resources  = ARRAY_SIZE(ar933x_uart_resources),
+        .dev = {
+                .platform_data  = &ar933x_uart_data,
+        },
+};
+
+static struct resource ath_uart_resources[] = {
+        {
+         .start = AR933X_UART_BASE,
+         .end = AR933X_UART_BASE + 0x0fff,
+         .flags = IORESOURCE_MEM,
+         },
+};
+
+static struct plat_serial8250_port ath_uart_data[] = {
+        {
+         .mapbase = (u32) KSEG1ADDR(AR933X_UART_BASE),
+         .membase = (void __iomem *)((u32) (KSEG1ADDR(AR933X_UART_BASE))),
+         .irq = AR7240_MISC_IRQ_UART,
+         .flags = (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST),
+         .iotype = UPIO_MEM32,
+         .regshift = 2,
+         .uartclk = 0,          /* ath_ahb_freq, */
+         },
+        {},
+};
+
+static struct platform_device ath_uart = {
+        .name = "serial8250",
+        .id = 0,
+        .dev.platform_data = ath_uart_data,
+        .num_resources = 1,
+        .resource = ath_uart_resources
+};
+
+
+
 static struct platform_device *ar7241_platform_devices[] __initdata = {
         &ar7240_usb_ehci_device
@@ -128 +187 @@
 
 static struct platform_device *ar724x_platform_devices[] __initdata = {
+#ifdef CONFIG_MACH_HORNET
+        &ar933x_uart_device,
+        &ath_uart
+#else
         &ar7240_uart
+#endif
 };
 
 extern __init ap91_pci_init(u8 *cal_data, u8 *mac_addr);
+void ar9xxx_add_device_wmac(u8 *cal_data, u8 *mac_addr) __init;
 
 static void *getCalData(int slot)
@@ -177 +242 @@
 
         /* need to set clock appropriately */
+#ifdef CONFIG_MACH_HORNET
+//      ath_uart_data[0].uartclk = ar7240_ahb_freq;
+//      ar933x_uart_data.uartclk = ar7240_ahb_freq;
+
+        ath_uart_data[0].uartclk = ar71xx_ref_freq;
+        ar933x_uart_data.uartclk = ar71xx_ref_freq;
+#endif
+
 #ifdef CONFIG_WASP_SUPPORT
         ar7240_uart_data[0].uartclk = ath_ref_clk_freq;
@@ -188 +261 @@
                 return ret; 
 
-        if (is_ar7241() || is_ar7242()  || is_ar9330() || is_wasp()) {
+        if (is_ar7241() || is_ar7242()  || is_ar933x() || is_wasp()) {
             ret = platform_add_devices(ar7241_platform_devices, 
                                 ARRAY_SIZE(ar7241_platform_devices));
@@ -197 +270 @@
         }
         
+#ifdef CONFIG_MACH_HORNET
+        ee = (u8 *) KSEG1ADDR(0x1fff1000);
+        ar9xxx_add_device_wmac(ee, NULL);
+#else
         ee = getCalData(0);
         ap91_pci_init(ee, mac);
+#endif
 return ret;
 }

src/linux/universal/linux-3.2/arch/mips/ar7240/prom.c

@@ -17 +17 @@
 
 int __ath_flash_size;
-
-extern void Uart16550Put(unsigned char byte);
-
-#define UART_READ(r) \
-        __raw_readl((void __iomem *)(KSEG1ADDR(AR7240_UART_BASE) + 4 * (r)))
-
-#define UART_WRITE(r, v) \
-        __raw_writel((v), (void __iomem *)(KSEG1ADDR(AR7240_UART_BASE) + 4*(r)))
-
-void prom_putchar(unsigned char ch)
-{
-        while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
-        UART_WRITE(UART_TX, ch);
-        while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
-}
 
 

src/linux/universal/linux-3.2/arch/mips/ar7240/setup.c

@@ -42 +42 @@
 
 static int __init ar7240_init_ioc(void);
-void Uart16550Init(void);
 void serial_print(char *fmt, ...);
 void writeserial(char *str,int count);
@@ -50 +49 @@
 static void ar7240_sys_frequency(void);
 #endif
+#ifdef CONFIG_MACH_HORNET
+static void hornet_sys_frequency(void);
+void UartHornetInit(void);
+void UartHornetPut(u8 byte);
+
+#define Uart16550Init          UartHornetInit
+#define Uart16550Put           UartHornetPut
+#else
+void Uart16550Init(void);
 u8 Uart16550GetPoll(void);
+#endif
 /* 
  * Export AHB freq value to be used by Ethernet MDIO.
@@ -141 +150 @@
                 rev = 1;
                 break;
+        case AR9330_REV_1_2:
+                chip = "9330";
+                rev = 2;
+                break;
+        case AR9331_REV_1_0:
+                chip = "9331";
+                rev = 0;
+                break;
+        case AR9331_REV_1_1:
+                chip = "9331";
+                rev = 1;
+                break;
+        case AR9331_REV_1_2:
+                chip = "9331";
+                rev = 2;
+                break;
         case AR9344_REV_1_0:
                 chip = "9344";
@@ -266 +291 @@
 ar7240_sys_frequency(void)
 {
-
+#ifdef CONFIG_MACH_HORNET
+    hornet_sys_frequency();
+#else /* CONFIG_MACH_HORNET */
 #ifdef CONFIG_AR7240_EMULATION
 #ifdef FB50
@@ -304 +331 @@
     ar7240_ahb_freq = ar7240_cpu_freq/ahb_div;
 #endif
-}
-#endif
-extern int early_serial_setup(struct uart_port *port);
-
-#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
-void __init
-serial_setup(void)
-{
-        struct uart_port p;
-
-        memset(&p, 0, sizeof(p));
-
-        p.flags     = AR71XX_UART_FLAGS;
-        p.iotype    = UPIO_MEM32;
-        p.uartclk   = ar7240_ahb_freq;
-        p.irq       = AR7240_MISC_IRQ_UART;
-        p.regshift  = 2;
-        p.membase   = (u8 *)KSEG1ADDR(AR7240_UART_BASE);
-
-        if (early_serial_setup(&p) != 0)
-                printk(KERN_ERR "early_serial_setup failed\n");
-        
-}
+#endif
+}
+#endif
 void __init plat_time_init(void)
 {
@@ -397 +404 @@
 #define AR71XX_MEM_SIZE_MIN     0x0200000
 #define AR71XX_MEM_SIZE_MAX     0x8000000
-
+static int ramsize;
 static void __init ar71xx_detect_mem_size(void)
 {
@@ -422 +429 @@
         }
         *p = memsave;
-
+        ramsize = size;
         add_memory_region(0, size, BOOT_MEM_RAM);
 }
@@ -437 +444 @@
 }
 
-
+#define AR71XX_REV_ID_REVISION_MASK     0x3
+#define AR71XX_REV_ID_REVISION_SHIFT    2
+#define AR933X_RESET_REG_BOOTSTRAP              0xac
+#define AR933X_RESET_REG_BOOTSTRAP              0xac
+#define AR933X_BOOTSTRAP_MDIO_GPIO_EN           BIT(18)
+#define AR933X_BOOTSTRAP_EEPBUSY                BIT(4)
+#define AR933X_BOOTSTRAP_REF_CLK_40             BIT(0)
+
+u32 ar71xx_soc_rev;
+EXPORT_SYMBOL_GPL(ar71xx_soc_rev);
+
+u32 ar71xx_ref_freq;
+EXPORT_SYMBOL_GPL(ar71xx_ref_freq);
 
 int is_ar9000;
@@ -443 +462 @@
 void __init plat_mem_setup(void)
 {
+u32 id;
+u32 t;
+u32 rev=0;
 
         if (is_ar7240()) {
@@ -450 +472 @@
         }else if (is_ar7242()) {
                 ar71xx_soc = AR71XX_SOC_AR7242;
+        }else if (is_ar9330()) {
+                ar71xx_soc = AR71XX_SOC_AR9330;
+        }else if (is_ar9331()) {
+                ar71xx_soc = AR71XX_SOC_AR9331;
+        }else if (is_ar9341()) {
+                ar71xx_soc = AR71XX_SOC_AR9341;
+        }else if (is_ar9342()) {
+                ar71xx_soc = AR71XX_SOC_AR9342;
+        }else if (is_ar9344()) {
+                ar71xx_soc = AR71XX_SOC_AR9344;
         } 
+        id = ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK;
+        ar71xx_soc_rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
+        ar71xx_soc_rev &= AR71XX_REV_ID_REVISION_MASK;
+
         
         ar71xx_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
@@ -465 +501 @@
         ar71xx_usb_ctrl_base = ioremap_nocache(AR71XX_USB_CTRL_BASE,
                                                 AR71XX_USB_CTRL_SIZE);
+
+
+
+#ifdef CONFIG_MACH_HORNET
+    if ( ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) & HORNET_BOOTSTRAP_SEL_25M_40M_MASK )
+                ar71xx_ref_freq = (40 * 1000 * 1000);
+    else
+                ar71xx_ref_freq = (25 * 1000 * 1000);
+#endif
 
 #if 0
@@ -489 +534 @@
     Uart16550Init();
 #ifdef CONFIG_MACH_HORNET
-    serial_print("Booting AR9330(Hornet)...\n");
+    serial_print("Booting %s(Hornet)...\n",get_system_type());
     /* clear wmac reset */
     ar7240_reg_wr(AR7240_RESET, (ar7240_reg_rd(AR7240_RESET) & (~AR7240_RESET_WMAC)));
@@ -510 +555 @@
 
 #define         REG_OFFSET              4
+
+static int serial_inited = 0;
+
+#define         MY_WRITE(y, z)  ((*((volatile u32*)(y))) = z)
+
+#ifndef CONFIG_MACH_HORNET
 
 /* === END OF CONFIG === */
@@ -534 +585 @@
 #define         UART16550_WRITE(x, z)  ar7240_reg_wr((AR7240_UART_BASE+x), z)
 
-static int serial_inited = 0;
-
-#define         MY_WRITE(y, z)  ((*((volatile u32*)(y))) = z)
 
 void Uart16550Init()
@@ -600 +648 @@
     UART16550_WRITE(OFS_SEND_BUFFER, byte);
 }
-
+#endif
 extern int vsprintf(char *buf, const char *fmt, va_list args);
 static char sprint_buf[1024];
@@ -631 +679 @@
     return ar7240_cpu_freq/1000000;
 }
-
+#ifdef CONFIG_MACH_HORNET
+
+void UartHornetInit(void)
+{
+    unsigned int    rdata;
+    unsigned int    baudRateDivisor, clock_step;
+    unsigned int    fcEnable = 0;        
+
+    ar7240_sys_frequency();
+
+#if 0
+    MY_WRITE(0xb8040000, 0xcff);
+    MY_WRITE(0xb8040008, 0x3b);
+    /* Enable UART , SPI and Disable S26 UART */ 
+    MY_WRITE(0xb8040028, (ar7240_reg_rd(0xb8040028) | 0x48002));
+
+    MY_WRITE(0xb8040008, 0x2f);
+#endif
+#ifdef CONFIG_HORNET_EMULATION
+    baudRateDivisor = ( ar7240_ahb_freq / (16*AG7240_CONSOLE_BAUD) ) - 1; // 24 MHz clock is taken as UART clock 
+#else
+
+    rdata = ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS);
+    rdata &= HORNET_BOOTSTRAP_SEL_25M_40M_MASK;
+
+    if (rdata)
+        baudRateDivisor = ( 40000000 / (16*AG7240_CONSOLE_BAUD) ) - 1; // 40 MHz clock is taken as UART clock        
+    else
+        baudRateDivisor = ( 25000000 / (16*AG7240_CONSOLE_BAUD) ) - 1; // 25 MHz clock is taken as UART clock        
+#endif
+
+    clock_step = 8192;
+    
+        rdata = UARTCLOCK_UARTCLOCKSCALE_SET(baudRateDivisor) | UARTCLOCK_UARTCLOCKSTEP_SET(clock_step);
+        uart_reg_write(UARTCLOCK_ADDRESS, rdata);    
+
+    /* Config Uart Controller */
+#if 1 /* No interrupt */
+        rdata = UARTCS_UARTDMAEN_SET(0) | UARTCS_UARTHOSTINTEN_SET(0) | UARTCS_UARTHOSTINT_SET(0)
+                | UARTCS_UARTSERIATXREADY_SET(0) | UARTCS_UARTTXREADYORIDE_SET(~fcEnable) 
+                | UARTCS_UARTRXREADYORIDE_SET(~fcEnable) | UARTCS_UARTHOSTINTEN_SET(0);
+#else    
+        rdata = UARTCS_UARTDMAEN_SET(0) | UARTCS_UARTHOSTINTEN_SET(0) | UARTCS_UARTHOSTINT_SET(0)
+                | UARTCS_UARTSERIATXREADY_SET(0) | UARTCS_UARTTXREADYORIDE_SET(~fcEnable) 
+                | UARTCS_UARTRXREADYORIDE_SET(~fcEnable) | UARTCS_UARTHOSTINTEN_SET(1);
+#endif                          
+                
+    /* is_dte == 1 */
+    rdata = rdata | UARTCS_UARTINTERFACEMODE_SET(2);   
+    
+        if (fcEnable) {
+           rdata = rdata | UARTCS_UARTFLOWCONTROLMODE_SET(2); 
+        }
+        
+    /* invert_fc ==0 (Inverted Flow Control) */
+    //rdata = rdata | UARTCS_UARTFLOWCONTROLMODE_SET(3);
+    
+    /* parityEnable == 0 */
+    //rdata = rdata | UARTCS_UARTPARITYMODE_SET(2); -->Parity Odd  
+    //rdata = rdata | UARTCS_UARTPARITYMODE_SET(3); -->Parity Even
+    uart_reg_write(UARTCS_ADDRESS, rdata);
+    
+    serial_inited = 1;
+}
+
+u8 UartHornetGetPoll(void)
+{
+    u8              ret_val;
+    unsigned int    rdata;    
+    
+    do {
+        rdata = uart_reg_read(UARTDATA_ADDRESS);
+    } while (!UARTDATA_UARTRXCSR_GET(rdata));
+    
+    ret_val = (u8)UARTDATA_UARTTXRXDATA_GET(rdata);
+    rdata = UARTDATA_UARTRXCSR_SET(1);
+    uart_reg_write(UARTDATA_ADDRESS, rdata);
+    
+    return ret_val;
+}
+
+void UartHornetPut(u8 byte)
+{
+    unsigned int rdata;
+    
+    if (!serial_inited) {
+        serial_inited = 1;
+        UartHornetInit();
+    }
+
+    do {
+        rdata = uart_reg_read(UARTDATA_ADDRESS);
+    } while (UARTDATA_UARTTXCSR_GET(rdata) == 0);
+    
+    rdata = UARTDATA_UARTTXRXDATA_SET((unsigned int)byte);
+    rdata |= UARTDATA_UARTTXCSR_SET(1);
+
+    uart_reg_write(UARTDATA_ADDRESS, rdata);
+}
+
+static void
+hornet_sys_frequency(void)
+{
+#ifdef CONFIG_HORNET_EMULATION
+    #ifdef CONFIG_HORNET_EMULATION_WLAN_HARDI /* FPGA WLAN emulation */
+    ar7240_cpu_freq = 48000000;
+    ar7240_ddr_freq = 48000000;
+    ar7240_ahb_freq = 24000000;    
+    #else
+    ar7240_cpu_freq = 80000000;
+    ar7240_ddr_freq = 80000000;
+    ar7240_ahb_freq = 40000000;
+    #endif
+#else
+    /* Hornet's PLL is completely different from Python's */
+    u32     ref_clock_rate, pll_freq;
+    u32     pllreg, clockreg;
+    u32     nint, refdiv, outdiv;
+    u32     cpu_div, ahb_div, ddr_div;
+
+    if ( ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) & HORNET_BOOTSTRAP_SEL_25M_40M_MASK )
+        ref_clock_rate = 40 * 1000000;
+    else
+        ref_clock_rate = 25 * 1000000;
+
+    pllreg   = ar7240_reg_rd(AR7240_CPU_PLL_CONFIG);
+    clockreg = ar7240_reg_rd(AR7240_CPU_CLOCK_CONTROL);    
+    
+    if (clockreg & HORNET_CLOCK_CONTROL_BYPASS_MASK) {
+        /* Bypass PLL */ 
+        pll_freq = ref_clock_rate;
+        cpu_div = ahb_div = ddr_div = 1;
+    }
+    else {
+        nint = (pllreg & HORNET_PLL_CONFIG_NINT_MASK) >> HORNET_PLL_CONFIG_NINT_SHIFT;
+        refdiv = (pllreg & HORNET_PLL_CONFIG_REFDIV_MASK) >> HORNET_PLL_CONFIG_REFDIV_SHIFT;
+        outdiv = (pllreg & HORNET_PLL_CONFIG_OUTDIV_MASK) >> HORNET_PLL_CONFIG_OUTDIV_SHIFT;
+        
+        pll_freq = (ref_clock_rate / refdiv) * nint;
+
+        if (outdiv == 1)
+            pll_freq /= 2;
+        else if (outdiv == 2)   
+            pll_freq /= 4;                    
+        else if (outdiv == 3)  
+            pll_freq /= 8;             
+        else if (outdiv == 4) 
+            pll_freq /= 16;                
+        else if (outdiv == 5) 
+            pll_freq /= 32;             
+        else if (outdiv == 6)  
+            pll_freq /= 64;              
+        else if (outdiv == 7)  
+            pll_freq /= 128;              
+        else /* outdiv == 0 --> illegal value */                                                                     
+            pll_freq /= 2;   
+
+        cpu_div = (clockreg & HORNET_CLOCK_CONTROL_CPU_POST_DIV_MASK) >> HORNET_CLOCK_CONTROL_CPU_POST_DIV_SHIFT;
+        ddr_div = (clockreg & HORNET_CLOCK_CONTROL_DDR_POST_DIV_MASK) >> HORNET_CLOCK_CONTROL_DDR_POST_DIV_SFIFT;
+        ahb_div = (clockreg & HORNET_CLOCK_CONTROL_AHB_POST_DIV_MASK) >> HORNET_CLOCK_CONTROL_AHB_POST_DIV_SFIFT;                     
+        
+        /*
+         * b00 : div by 1, b01 : div by 2, b10 : div by 3, b11 : div by 4
+         */
+        cpu_div++;
+        ddr_div++;
+        ahb_div++;        
+    }
+    
+    ar7240_cpu_freq = pll_freq / cpu_div;
+    ar7240_ddr_freq = pll_freq / ddr_div;
+    ar7240_ahb_freq = pll_freq / ahb_div;    
+#endif
+}
+#endif
+

src/linux/universal/linux-3.2/arch/mips/include/asm/mach-ar71xx/ar71xx.h

@@ -86 +86 @@
 #define AR71XX_MEM_SIZE_MAX     0x10000000
 
-#define AR71XX_CPU_IRQ_BASE    0
-#define AR71XX_MISC_IRQ_BASE   8
-#define AR71XX_MISC_IRQ_COUNT  8
-#define AR71XX_GPIO_IRQ_BASE   16
-#define AR71XX_GPIO_IRQ_COUNT  32
-#define AR71XX_PCI_IRQ_BASE     48
-#define AR71XX_PCI_IRQ_COUNT   8
+#define AR71XX_CPU_IRQ_BASE     0
+#define AR71XX_MISC_IRQ_BASE    0x10
+#define AR71XX_MISC_IRQ_COUNT   13
+#define AR71XX_GPIO_IRQ_BASE    0x20
+#define AR71XX_GPIO_IRQ_COUNT   16
+#define AR71XX_PCI_IRQ_BASE     0x30
+#define AR71XX_PCI_IRQ_COUNT    1
+#define AR934X_IP2_IRQ_BASE     0x40
+#define AR934X_IP2_IRQ_COUNT    2
 
 #define AR71XX_CPU_IRQ_IP2      (AR71XX_CPU_IRQ_BASE + 2)

src/linux/universal/linux-3.2/arch/mips/include/asm/mach-ar7240/ar7240.h

@@ -3 +3 @@
 
 #include <asm/addrspace.h>
+
+#ifdef CONFIG_MACH_HORNET
+#include "ar933x.h"
+#endif
 
 typedef unsigned int ar7240_reg_t;
@@ -238 +242 @@
  * The IPs. Connected to CPU (hardware IP's; the first two are software)
  */
-#define AR7240_CPU_IRQ_PCI                  AR7240_CPU_IRQ_BASE+2
+#ifdef CONFIG_WASP_SUPPORT
+#define ATH_CPU_IRQ_WLAN                AR7240_CPU_IRQ_BASE+2
+#define AR7240_CPU_IRQ_PCI              AR7240_CPU_IRQ_BASE+8
+#elif defined (CONFIG_MACH_HORNET)
+#define ATH_CPU_IRQ_WLAN                AR7240_CPU_IRQ_BASE+2
+#else
+#define AR7240_CPU_IRQ_PCI              AR7240_CPU_IRQ_BASE+2
+#endif
 #define AR7240_CPU_IRQ_USB                  AR7240_CPU_IRQ_BASE+3
 #define AR7240_CPU_IRQ_GE0                  AR7240_CPU_IRQ_BASE+4
@@ -741 +752 @@
 #define AR7242_REV_1_1                  0x1101
 #define AR9330_REV_1_0                  0x0110
+#define AR9331_REV_1_0                  0x1110
 #define AR9330_REV_1_1                  0x0111
-
+#define AR9331_REV_1_1                  0x1111
+#define AR9330_REV_1_2                  0x0112
+#define AR9331_REV_1_2                  0x1112
 #define AR9344_REV_1_0                  0x2120
 #define AR9342_REV_1_0                  0x1120
 #define AR9341_REV_1_0                  0x0120
+#define AR9344_REV_1_1                  0x2121
+#define AR9342_REV_1_1                  0x1121
+#define AR9341_REV_1_1                  0x0121
 
 
@@ -762 +779 @@
 #define is_ar9341()     ((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9341_REV_1_0)
 
-#define is_ar9330()     (((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9330_REV_1_0) || \
-                        ((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9330_REV_1_1))
+#define is_ar9330() (((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9330_REV_1_0) || \
+                        ((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9330_REV_1_1) || \
+                        ((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9330_REV_1_2))
+
+#define is_ar9331() (((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9331_REV_1_0) || \
+                        ((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9331_REV_1_1) || \
+                        ((ar7240_reg_rd(AR7240_REV_ID) & AR7240_REV_ID_MASK) == AR9331_REV_1_2))
 
 #define is_ar934x()     (is_ar9344() || is_ar9342() || is_ar9341())
+
+#define is_ar933x() (is_ar9330() || is_ar9331())
 
 
@@ -793 +817 @@
 #define AR7240_RESET_GE0_MAC                (1 << 9)
 #define AR7240_RESET_GE0_PHY                (1 << 8)
+#ifdef CONFIG_MACH_HORNET
+#define AR7240_RESET_WMAC                       (1 << 11)
+#else
+#define AR7240_RESET_USB_PHY_ANALOG             (1 << 11)
+#endif
 #define AR7240_RESET_PCIE_PHY_SHIFT         (1 << 10)
 #define AR7240_RESET_USBSUS_OVRIDE          (1 << 3)

src/linux/universal/linux-3.2/drivers/mtd/devices/Kconfig

@@ -338 +338 @@
 config WZRG450NH 
         bool "support for buffalo WZR HP G450NH"
-        depends on MACH_AR7240
+        depends on MACH_AR7240 
 config WZRG300NH2
         bool "support for buffalo WZR HP G300NH2"
@@ -344 +344 @@
 config MTD_AR7240_SPI_FLASH
         bool "Support for ar7240 spi flash"
-        depends on MTD && MACH_AR7240
+        depends on MTD && (MACH_AR7240 || MACH_HORNET)
 
 endmenu

src/linux/universal/linux-3.2/drivers/mtd/maps/Makefile

@@ -62 +62 @@
 obj-$(CONFIG_MACH_AR7100)       += nvram_kernel.o
 obj-$(CONFIG_MACH_AR7240)       += nvram_kernel.o
+obj-$(CONFIG_MACH_HORNET)       += nvram_kernel.o
 obj-$(CONFIG_MACH_GW2388)       += nvram_kernel.o
 obj-$(CONFIG_LANTIQ)            += nvram_kernel.o

src/linux/universal/linux-3.2/drivers/net/ethernet/ag7240/ag7240.c

@@ -441 +441 @@
     ag7240_desc_t *r0, *t0;
     uint32_t mgmt_cfg_val,ac;
-    u32 check_cnt;
+    u32 check_cnt=0;
 
 #ifdef CONFIG_AR7242_RTL8309G_PHY
@@ -493 +493 @@
                       mgmt_cfg_val = 0x9;
                       break;
+            case 40:
+            case 24:
+                /* hornet emulation...ahb is either 24 or 40Mhz */
+                mgmt_cfg_val = 0x6;
             default:
                      mgmt_cfg_val = 0x7;
@@ -530 +534 @@
         }
 #endif
+        else
+          if(is_ar933x()){
+            ar7240_reg_wr(AG7240_ETH_CFG, AG7240_ETH_CFG_MII_GE0_SLAVE); 
+            mgmt_cfg_val = 0xF;
+            if (mac->mac_unit == 1) {
+                while (check_cnt++ < 10) {
+                    ag7240_reg_wr(mac, AG7240_MAC_MII_MGMT_CFG, mgmt_cfg_val | (1 << 31));
+                    ag7240_reg_wr(mac, AG7240_MAC_MII_MGMT_CFG, mgmt_cfg_val);
+                    break;
+                }
+                if(check_cnt == 11)
+                    printk("%s: MDC check failed (Hornet)\n", __func__);
+            }
+        }
         else { /* Python 1.0 & 1.1 */
             if (mac->mac_unit == 0) {
@@ -764 +782 @@
                     ar7100_set_gpio(13+i,0);
                 #endif
-                    s26_wr_phy(i,0x19,(s26_rd_phy(i,0x19) | (0x3c0)));
+                        if(is_ar933x()) {
+                                s26_wr_phy(i,0x19, 0x3c0);
+                                s26_wr_phy(i,0x18,(0x4));
+                        } else {
+                                s26_wr_phy(i,0x19,(s26_rd_phy( i,0x19) | (0x3c0)));
+                        }
                     continue;
                 }
@@ -775 +798 @@
                         ar7100_set_gpio(13+i,1);
                 #endif
+                            if(is_ar933x()&& bRateTab->rate <= MB(5)){
+                                            s26_wr_phy(i,0x18, 0);
+                            } else {
                         s26_wr_phy(i,0x18,((bRateTab->timeOn << 12)|(bRateTab->timeOff << 8)));
+                            }
+                            if(is_ar933x()) {
+                                s26_wr_phy(i,0x19, 0x140);                            
+                            } else {
                         s26_wr_phy(i,0x19,(s26_rd_phy(i,0x19) & ~(0x280)));                
+                            }
                         break;
                     }
@@ -787 +818 @@
             }
         }
+            if(!is_ar933x()) {
         /* Flush all LAN MIB counters */
         athrs26_reg_write(0x80,((1 << 17) | (1 << 24))); 
         while ((athrs26_reg_read(0x80) & 0x20000) == 0x20000);
         athrs26_reg_write(0x80,0);
+        }
     }
 
@@ -805 +838 @@
 //              ar7100_set_gpio(17,0);                
 //                #endif
+                    if(is_ar933x()) {
+                s26_wr_phy(4,0x19,((0x3c0)));
+                    
+                    }else
+                    {
                 s26_wr_phy(4,0x19,(s26_rd_phy(4,0x19) | (0x3c0)));
+                }
                 goto done;
             }
@@ -817 +856 @@
 //                #endif
                     s26_wr_phy(4,0x18,((bRateTab->timeOn << 12)|(bRateTab->timeOff << 8)));
+                        if(is_ar933x()) {
+                    s26_wr_phy(4,0x19,0x140);
+                        } else {
                     s26_wr_phy(4,0x19,(s26_rd_phy(4,0x19) & ~(0x280)));
+                        }
+
                     break;
                 }
@@ -2306 +2350 @@
 #endif 
 #ifdef CONFIG_ETH_SOFT_LED
-        if (is_ar7240())
+    if (is_ar7240() || is_ar933x()) 
             mac_set_flag(mac,ETH_SOFT_LED);
 #endif

src/linux/universal/linux-3.2/drivers/net/ethernet/ag7240/ag7240_phy.h

@@ -100 +100 @@
     } else 
 #endif 
-  if (is_ar7241() || is_ar7240())
+  if (is_ar7241() || is_ar7240() || is_ar933x())
     athrs26_phy_setup (unit);
   else if (is_ar7242() && unit == 1) 
@@ -127 +127 @@
 #endif
 
-  if (is_ar7240() || is_ar7241() || (is_ar7242() && unit == 1)) {
+  if (is_ar7240() || is_ar7241() || (is_ar7242() && unit == 1) || is_ar933x()) {
     *link=ag7240_phy_is_up(unit);
     *fdx=ag7240_phy_is_fdx(unit, phyUnit);

src/linux/universal/linux-3.2/drivers/tty/serial/Kconfig

@@ -1625 +1625 @@
           Enable a Xilinx PS UART port to be the system console.
 
+config SERIAL_AR933X
+        bool "AR933X serial port support"
+        depends on MACH_HORNET
+        select SERIAL_CORE
+        help
+          If you have an Atheros AR933X SOC based board and want to use the
+          built-in UART of the SoC, say Y to this option.
+
+config SERIAL_AR933X_CONSOLE
+        bool "Console on AR933X serial port"
+        depends on SERIAL_AR933X=y
+        select SERIAL_CORE_CONSOLE
+        help
+          Enable a built-in UART port of the AR933X to be the system console.
+
+config SERIAL_AR933X_NR_UARTS
+        int "Maximum number of AR933X serial ports"
+        depends on SERIAL_AR933X
+        default "2"
+        help
+          Set this to the number of serial ports you want the driver
+          to support.
+
+
 endmenu

src/linux/universal/linux-3.2/drivers/tty/serial/Makefile

@@ -98 +98 @@
 obj-$(CONFIG_SERIAL_LANTIQ)     += lantiq.o
 obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o
+obj-$(CONFIG_SERIAL_AR933X)     += ar933x_uart.o
+#obj-$(CONFIG_SERIAL_AR933X)    += hornet_serial.o

src/linux/universal/linux-3.2/drivers/usb/Kconfig

@@ -67 +67 @@
         default y if ARCH_IXP4XX
         default y if MACH_AR7100
+        default y if MACH_HORNET
         default y if ARCH_W90X900
         default y if ARCH_AT91SAM9G45

src/linux/universal/linux-3.2/drivers/usb/host/ehci-ar71xx.c

@@ -257 +257 @@
 
     /* Added 5_29_07 */
-#ifdef MACH_AR7240
+#ifdef CONFIG_MACH_AR7240
     ar9130_reg_rmw_set(AR9130_RESET,AR9130_RESET_USBSUS_OVRIDE |AR7240_RESET_USB_PHY_ANALOG);
 #else

src/linux/universal/linux-3.2/include/linux/serial_core.h

@@ -207 +207 @@
 /* Xilinx PSS UART */
 #define PORT_XUARTPS    98
+
+/* Atheros AR933X SoC */
+#define PORT_AR933X     99
 
 #ifdef __KERNEL__

src/linux/universal/linux-3.2/init/main.c

@@ -574 +574 @@
          * this. But we do want output early, in case something goes wrong.
          */
+         printk(KERN_EMERG "console initcall\n");
         console_init();
+         printk(KERN_EMERG "console initcall done\n");
         if (panic_later)
                 panic(panic_later, panic_param);
@@ -785 +787 @@
         }*/
         run_init_process("/sbin/init");
+//      run_init_process("/bin/sh");
 
         panic("No init found.  Try passing init= option to kernel. "