Ignore:
Timestamp:
Apr 18, 2017, 8:47:31 AM (3 months ago)
Author:
brainslayer
Message:

update kernels

File:
1 edited

Legend:

Unmodified
Added
Removed
  • src/linux/universal/linux-4.9/drivers/gpu/drm/i915/i915_irq.c

    r31574 r31884  
    991991}
    992992
    993 static bool vlv_c0_above(struct drm_i915_private *dev_priv,
    994                          const struct intel_rps_ei *old,
    995                          const struct intel_rps_ei *now,
    996                          int threshold)
    997 {
    998         u64 time, c0;
    999         unsigned int mul = 100;
    1000 
    1001         if (old->cz_clock == 0)
    1002                 return false;
    1003 
    1004         if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
    1005                 mul <<= 8;
    1006 
    1007         time = now->cz_clock - old->cz_clock;
    1008         time *= threshold * dev_priv->czclk_freq;
    1009 
    1010         /* Workload can be split between render + media, e.g. SwapBuffers
    1011          * being blitted in X after being rendered in mesa. To account for
    1012          * this we need to combine both engines into our activity counter.
    1013          */
    1014         c0 = now->render_c0 - old->render_c0;
    1015         c0 += now->media_c0 - old->media_c0;
    1016         c0 *= mul * VLV_CZ_CLOCK_TO_MILLI_SEC;
    1017 
    1018         return c0 >= time;
    1019 }
    1020 
    1021993void gen6_rps_reset_ei(struct drm_i915_private *dev_priv)
    1022994{
    1023         vlv_c0_read(dev_priv, &dev_priv->rps.down_ei);
    1024         dev_priv->rps.up_ei = dev_priv->rps.down_ei;
     995        memset(&dev_priv->rps.ei, 0, sizeof(dev_priv->rps.ei));
    1025996}
    1026997
    1027998static u32 vlv_wa_c0_ei(struct drm_i915_private *dev_priv, u32 pm_iir)
    1028999{
     1000        const struct intel_rps_ei *prev = &dev_priv->rps.ei;
    10291001        struct intel_rps_ei now;
    10301002        u32 events = 0;
    10311003
    1032         if ((pm_iir & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED)) == 0)
     1004        if ((pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) == 0)
    10331005                return 0;
    10341006
     
    10371009                return 0;
    10381010
    1039         if (pm_iir & GEN6_PM_RP_DOWN_EI_EXPIRED) {
    1040                 if (!vlv_c0_above(dev_priv,
    1041                                   &dev_priv->rps.down_ei, &now,
    1042                                   dev_priv->rps.down_threshold))
    1043                         events |= GEN6_PM_RP_DOWN_THRESHOLD;
    1044                 dev_priv->rps.down_ei = now;
    1045         }
    1046 
    1047         if (pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) {
    1048                 if (vlv_c0_above(dev_priv,
    1049                                  &dev_priv->rps.up_ei, &now,
    1050                                  dev_priv->rps.up_threshold))
    1051                         events |= GEN6_PM_RP_UP_THRESHOLD;
    1052                 dev_priv->rps.up_ei = now;
    1053         }
    1054 
     1011        if (prev->cz_clock) {
     1012                u64 time, c0;
     1013                unsigned int mul;
     1014
     1015                mul = VLV_CZ_CLOCK_TO_MILLI_SEC * 100; /* scale to threshold% */
     1016                if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
     1017                        mul <<= 8;
     1018
     1019                time = now.cz_clock - prev->cz_clock;
     1020                time *= dev_priv->czclk_freq;
     1021
     1022                /* Workload can be split between render + media,
     1023                 * e.g. SwapBuffers being blitted in X after being rendered in
     1024                 * mesa. To account for this we need to combine both engines
     1025                 * into our activity counter.
     1026                 */
     1027                c0 = now.render_c0 - prev->render_c0;
     1028                c0 += now.media_c0 - prev->media_c0;
     1029                c0 *= mul;
     1030
     1031                if (c0 > time * dev_priv->rps.up_threshold)
     1032                        events = GEN6_PM_RP_UP_THRESHOLD;
     1033                else if (c0 < time * dev_priv->rps.down_threshold)
     1034                        events = GEN6_PM_RP_DOWN_THRESHOLD;
     1035        }
     1036
     1037        dev_priv->rps.ei = now;
    10551038        return events;
    10561039}
     
    44914474        if (IS_VALLEYVIEW(dev_priv))
    44924475                /* WaGsvRC0ResidencyMethod:vlv */
    4493                 dev_priv->pm_rps_events = GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED;
     4476                dev_priv->pm_rps_events = GEN6_PM_RP_UP_EI_EXPIRED;
    44944477        else
    44954478                dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS;
     
    45314514        if (!IS_GEN2(dev_priv))
    45324515                dev->vblank_disable_immediate = true;
     4516
     4517        /* Most platforms treat the display irq block as an always-on
     4518         * power domain. vlv/chv can disable it at runtime and need
     4519         * special care to avoid writing any of the display block registers
     4520         * outside of the power domain. We defer setting up the display irqs
     4521         * in this case to the runtime pm.
     4522         */
     4523        dev_priv->display_irqs_enabled = true;
     4524        if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
     4525                dev_priv->display_irqs_enabled = false;
    45334526
    45344527        dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp;
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