dwc_otg_pcd.c

Revision 12433, 64.8 kB (checked in by BrainSlayer, 5 months ago)
fixes usb issues with some devices

Line
1	/* ==========================================================================
2	* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.c $
3	* $Revision: 1.5 $
4	* $Date: 2008-11-27 09:21:25 $
5	* $Change: 1115682 $
6	*
7	* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8	* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9	* otherwise expressly agreed to in writing between Synopsys and you.
10	*
11	* The Software IS NOT an item of Licensed Software or Licensed Product under
12	* any End User Software License Agreement or Agreement for Licensed Product
13	* with Synopsys or any supplement thereto. You are permitted to use and
14	* redistribute this Software in source and binary forms, with or without
15	* modification, provided that redistributions of source code must retain this
16	* notice. You may not view, use, disclose, copy or distribute this file or
17	* any information contained herein except pursuant to this license grant from
18	* Synopsys. If you do not agree with this notice, including the disclaimer
19	* below, then you are not authorized to use the Software.
20	*
21	* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24	* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25	* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
31	* DAMAGE.
32	* ========================================================================== */
33	#ifndef DWC_HOST_ONLY
34
35	/** @file
36	* This file implements the Peripheral Controller Driver.
37	*
38	* The Peripheral Controller Driver (PCD) is responsible for
39	* translating requests from the Function Driver into the appropriate
40	* actions on the DWC_otg controller. It isolates the Function Driver
41	* from the specifics of the controller by providing an API to the
42	* Function Driver.
43	*
44	* The Peripheral Controller Driver for Linux will implement the
45	* Gadget API, so that the existing Gadget drivers can be used.
46	* (Gadget Driver is the Linux terminology for a Function Driver.)
47	*
48	* The Linux Gadget API is defined in the header file
49	* <code><linux/usb_gadget.h></code>. The USB EP operations API is
50	* defined in the structure <code>usb_ep_ops</code> and the USB
51	* Controller API is defined in the structure
52	* <code>usb_gadget_ops</code>.
53	*
54	* An important function of the PCD is managing interrupts generated
55	* by the DWC_otg controller. The implementation of the DWC_otg device
56	* mode interrupt service routines is in dwc_otg_pcd_intr.c.
57	*
58	* @todo Add Device Mode test modes (Test J mode, Test K mode, etc).
59	* @todo Does it work when the request size is greater than DEPTSIZ
60	* transfer size
61	*
62	*/
63
64
65	#include <linux/kernel.h>
66	#include <linux/module.h>
67	#include <linux/moduleparam.h>
68	#include <linux/init.h>
69	#include <linux/device.h>
70	#include <linux/errno.h>
71	#include <linux/list.h>
72	#include <linux/interrupt.h>
73	#include <linux/string.h>
74	#include <linux/dma-mapping.h>
75	#include <linux/version.h>
76
77	//#include <asm/arch/lm.h>
78	//#include <asm/arch/irqs.h>
79	#include <asm/rt2880/lm.h>
80
81	#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
82	# include <linux/usb/ch9.h>
83	#else
84	# include <linux/usb_ch9.h>
85	#endif
86
87	#include <linux/usb_gadget.h>
88
89
90
91	#include "dwc_otg_driver.h"
92	#include "dwc_otg_pcd.h"
93
94
95
96	/**
97	* Static PCD pointer for use in usb_gadget_register_driver and
98	* usb_gadget_unregister_driver. Initialized in dwc_otg_pcd_init.
99	*/
100	static dwc_otg_pcd_t *s_pcd = 0;
101
102
103	/* Display the contents of the buffer */
104	extern void dump_msg(const u8 *buf, unsigned int length);
105
106
107	/**
108	* This function completes a request. It call's the request call back.
109	*/
110	void dwc_otg_request_done(dwc_otg_pcd_ep_t ep, dwc_otg_pcd_request_t req,
111	int status)
112	{
113	unsigned stopped = ep->stopped;
114
115	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, ep);
116	list_del_init(&req->queue);
117
118	if (req->req.status == -EINPROGRESS) {
119	req->req.status = status;
120	} else {
121	status = req->req.status;
122	}
123
124	/* don't modify queue heads during completion callback */
125	ep->stopped = 1;
126	SPIN_UNLOCK(&ep->pcd->lock);
127	req->req.complete(&ep->ep, &req->req);
128	SPIN_LOCK(&ep->pcd->lock);
129
130	if (ep->pcd->request_pending > 0) {
131	--ep->pcd->request_pending;
132	}
133
134	ep->stopped = stopped;
135	}
136
137	/**
138	* This function terminates all the requsts in the EP request queue.
139	*/
140	void dwc_otg_request_nuke(dwc_otg_pcd_ep_t *ep)
141	{
142	dwc_otg_pcd_request_t *req;
143
144	ep->stopped = 1;
145
146	/* called with irqs blocked?? */
147	while (!list_empty(&ep->queue)) {
148	req = list_entry(ep->queue.next, dwc_otg_pcd_request_t,
149	queue);
150	dwc_otg_request_done(ep, req, -ESHUTDOWN);
151	}
152	}
153
154	/* USB Endpoint Operations */
155	/*
156	* The following sections briefly describe the behavior of the Gadget
157	* API endpoint operations implemented in the DWC_otg driver
158	* software. Detailed descriptions of the generic behavior of each of
159	* these functions can be found in the Linux header file
160	* include/linux/usb_gadget.h.
161	*
162	* The Gadget API provides wrapper functions for each of the function
163	* pointers defined in usb_ep_ops. The Gadget Driver calls the wrapper
164	* function, which then calls the underlying PCD function. The
165	* following sections are named according to the wrapper
166	* functions. Within each section, the corresponding DWC_otg PCD
167	* function name is specified.
168	*
169	*/
170
171	/**
172	* This function assigns periodic Tx FIFO to an periodic EP
173	* in shared Tx FIFO mode
174	*/
175	static uint32_t assign_perio_tx_fifo(dwc_otg_core_if_t *core_if)
176	{
177	uint32_t PerTxMsk = 1;
178	int i;
179	for(i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; ++i)
180	{
181	if((PerTxMsk & core_if->p_tx_msk) == 0) {
182	core_if->p_tx_msk \|= PerTxMsk;
183	return i + 1;
184	}
185	PerTxMsk <<= 1;
186	}
187	return 0;
188	}
189	/**
190	* This function releases periodic Tx FIFO
191	* in shared Tx FIFO mode
192	*/
193	static void release_perio_tx_fifo(dwc_otg_core_if_t *core_if, uint32_t fifo_num)
194	{
195	core_if->p_tx_msk = (core_if->p_tx_msk & (1 << (fifo_num - 1))) ^ core_if->p_tx_msk;
196	}
197	/**
198	* This function assigns periodic Tx FIFO to an periodic EP
199	* in shared Tx FIFO mode
200	*/
201	static uint32_t assign_tx_fifo(dwc_otg_core_if_t *core_if)
202	{
203	uint32_t TxMsk = 1;
204	int i;
205
206	for(i = 0; i < core_if->hwcfg4.b.num_in_eps; ++i)
207	{
208	if((TxMsk & core_if->tx_msk) == 0) {
209	core_if->tx_msk \|= TxMsk;
210	return i + 1;
211	}
212	TxMsk <<= 1;
213	}
214	return 0;
215	}
216	/**
217	* This function releases periodic Tx FIFO
218	* in shared Tx FIFO mode
219	*/
220	static void release_tx_fifo(dwc_otg_core_if_t *core_if, uint32_t fifo_num)
221	{
222	core_if->tx_msk = (core_if->tx_msk & (1 << (fifo_num - 1))) ^ core_if->tx_msk;
223	}
224
225	/**
226	* This function is called by the Gadget Driver for each EP to be
227	* configured for the current configuration (SET_CONFIGURATION).
228	*
229	* This function initializes the dwc_otg_ep_t data structure, and then
230	* calls dwc_otg_ep_activate.
231	*/
232	static int dwc_otg_pcd_ep_enable(struct usb_ep *usb_ep,
233	const struct usb_endpoint_descriptor *ep_desc)
234	{
235	dwc_otg_pcd_ep_t *ep = 0;
236	dwc_otg_pcd_t *pcd = 0;
237	unsigned long flags;
238
239	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p)\n", __func__, usb_ep, ep_desc);
240
241	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
242	if (!usb_ep \|\| !ep_desc \|\| ep->desc \|\|
243	ep_desc->bDescriptorType != USB_DT_ENDPOINT) {
244	DWC_WARN("%s, bad ep or descriptor\n", __func__);
245	return -EINVAL;
246	}
247	if (ep == &ep->pcd->ep0) {
248	DWC_WARN("%s, bad ep(0)\n", __func__);
249	return -EINVAL;
250	}
251
252	/* Check FIFO size? */
253	if (!ep_desc->wMaxPacketSize) {
254	DWC_WARN("%s, bad %s maxpacket\n", __func__, usb_ep->name);
255	return -ERANGE;
256	}
257
258	pcd = ep->pcd;
259	if (!pcd->driver \|\| pcd->gadget.speed == USB_SPEED_UNKNOWN) {
260	DWC_WARN("%s, bogus device state\n", __func__);
261	return -ESHUTDOWN;
262	}
263
264	SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
265
266	ep->desc = ep_desc;
267	ep->ep.maxpacket = le16_to_cpu (ep_desc->wMaxPacketSize);
268
269	/*
270	* Activate the EP
271	*/
272	ep->stopped = 0;
273
274	ep->dwc_ep.is_in = (USB_DIR_IN & ep_desc->bEndpointAddress) != 0;
275	ep->dwc_ep.maxpacket = ep->ep.maxpacket;
276
277	ep->dwc_ep.type = ep_desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
278
279	if(ep->dwc_ep.is_in) {
280	if(!pcd->otg_dev->core_if->en_multiple_tx_fifo) {
281	ep->dwc_ep.tx_fifo_num = 0;
282
283	if (ep->dwc_ep.type == USB_ENDPOINT_XFER_ISOC) {
284	/*
285	* if ISOC EP then assign a Periodic Tx FIFO.
286	*/
287	ep->dwc_ep.tx_fifo_num = assign_perio_tx_fifo(pcd->otg_dev->core_if);
288	}
289	} else {
290	/*
291	* if Dedicated FIFOs mode is on then assign a Tx FIFO.
292	*/
293	ep->dwc_ep.tx_fifo_num = assign_tx_fifo(pcd->otg_dev->core_if);
294
295	}
296	}
297	/* Set initial data PID. */
298	if (ep->dwc_ep.type == USB_ENDPOINT_XFER_BULK) {
299	ep->dwc_ep.data_pid_start = 0;
300	}
301
302	DWC_DEBUGPL(DBG_PCD, "Activate %s-%s: type=%d, mps=%d desc=%p\n",
303	ep->ep.name, (ep->dwc_ep.is_in ?"IN":"OUT"),
304	ep->dwc_ep.type, ep->dwc_ep.maxpacket, ep->desc);
305
306	if(ep->dwc_ep.type != USB_ENDPOINT_XFER_ISOC) {
307	ep->dwc_ep.desc_addr = dwc_otg_ep_alloc_desc_chain(&ep->dwc_ep.dma_desc_addr, MAX_DMA_DESC_CNT);
308	}
309
310	dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep);
311	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
312
313	return 0;
314	}
315
316	/**
317	* This function is called when an EP is disabled due to disconnect or
318	* change in configuration. Any pending requests will terminate with a
319	* status of -ESHUTDOWN.
320	*
321	* This function modifies the dwc_otg_ep_t data structure for this EP,
322	* and then calls dwc_otg_ep_deactivate.
323	*/
324	static int dwc_otg_pcd_ep_disable(struct usb_ep *usb_ep)
325	{
326	dwc_otg_pcd_ep_t *ep;
327	dwc_otg_pcd_t *pcd = 0;
328	unsigned long flags;
329
330	DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, usb_ep);
331	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
332	if (!usb_ep \|\| !ep->desc) {
333	DWC_DEBUGPL(DBG_PCD, "%s, %s not enabled\n", __func__,
334	usb_ep ? ep->ep.name : NULL);
335	return -EINVAL;
336	}
337
338	SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
339
340	dwc_otg_request_nuke(ep);
341
342	dwc_otg_ep_deactivate(GET_CORE_IF(ep->pcd), &ep->dwc_ep);
343	ep->desc = 0;
344	ep->stopped = 1;
345
346	if(ep->dwc_ep.is_in) {
347	dwc_otg_flush_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
348	release_perio_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
349	release_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
350	}
351
352	/* Free DMA Descriptors */
353	pcd = ep->pcd;
354
355	SPIN_UNLOCK_IRQRESTORE(&ep->pcd->lock, flags);
356
357	if(ep->dwc_ep.type != USB_ENDPOINT_XFER_ISOC && ep->dwc_ep.desc_addr) {
358	dwc_otg_ep_free_desc_chain(ep->dwc_ep.desc_addr, ep->dwc_ep.dma_desc_addr, MAX_DMA_DESC_CNT);
359	}
360
361	DWC_DEBUGPL(DBG_PCD, "%s disabled\n", usb_ep->name);
362	return 0;
363	}
364
365
366	/**
367	* This function allocates a request object to use with the specified
368	* endpoint.
369	*
370	* @param ep The endpoint to be used with with the request
371	* @param gfp_flags the GFP_* flags to use.
372	*/
373	static struct usb_request dwc_otg_pcd_alloc_request(struct usb_ep ep,
374	#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
375	int gfp_flags
376	#else
377	gfp_t gfp_flags
378	#endif
379	)
380	{
381	dwc_otg_pcd_request_t *req;
382
383	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%d)\n", __func__, ep, gfp_flags);
384	if (0 == ep) {
385	DWC_WARN("%s() %s\n", __func__, "Invalid EP!\n");
386	return 0;
387	}
388	req = kmalloc(sizeof(dwc_otg_pcd_request_t), gfp_flags);
389	if (0 == req) {
390	DWC_WARN("%s() %s\n", __func__,
391	"request allocation failed!\n");
392	return 0;
393	}
394	memset(req, 0, sizeof(dwc_otg_pcd_request_t));
395	req->req.dma = DMA_ADDR_INVALID;
396	INIT_LIST_HEAD(&req->queue);
397	return &req->req;
398	}
399
400	/**
401	* This function frees a request object.
402	*
403	* @param ep The endpoint associated with the request
404	* @param req The request being freed
405	*/
406	static void dwc_otg_pcd_free_request(struct usb_ep *ep,
407	struct usb_request *req)
408	{
409	dwc_otg_pcd_request_t *request;
410	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p)\n", __func__, ep, req);
411
412	if (0 == ep \|\| 0 == req) {
413	DWC_WARN("%s() %s\n", __func__,
414	"Invalid ep or req argument!\n");
415	return;
416	}
417
418	request = container_of(req, dwc_otg_pcd_request_t, req);
419	kfree(request);
420	}
421
422	/**
423	* This function allocates an I/O buffer to be used for a transfer
424	* to/from the specified endpoint.
425	*
426	* @param usb_ep The endpoint to be used with with the request
427	* @param bytes The desired number of bytes for the buffer
428	* @param dma Pointer to the buffer's DMA address; must be valid
429	* @param gfp_flags the GFP_* flags to use.
430	* @return address of a new buffer or null is buffer could not be allocated.
431	*/
432	static void dwc_otg_pcd_alloc_buffer(struct usb_ep usb_ep, unsigned bytes,
433	dma_addr_t *dma,
434	#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
435	int gfp_flags
436	#else
437	gfp_t gfp_flags
438	#endif
439	)
440	{
441	void *buf;
442	dwc_otg_pcd_ep_t *ep;
443	dwc_otg_pcd_t *pcd = 0;
444
445	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
446	pcd = ep->pcd;
447
448	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%d,%p,%0x)\n", __func__, usb_ep, bytes,
449	dma, gfp_flags);
450
451	/* Check dword alignment */
452	if ((bytes & 0x3UL) != 0) {
453	DWC_WARN("%s() Buffer size is not a multiple of"
454	"DWORD size (%d)",__func__, bytes);
455	}
456
457	if (GET_CORE_IF(pcd)->dma_enable) {
458	buf = dma_alloc_coherent (NULL, bytes, dma, gfp_flags);
459	}
460	else {
461	buf = kmalloc(bytes, gfp_flags);
462	}
463
464	/* Check dword alignment */
465	if (((int)buf & 0x3UL) != 0) {
466	DWC_WARN("%s() Buffer is not DWORD aligned (%p)",
467	__func__, buf);
468	}
469
470	return buf;
471	}
472
473	/**
474	* This function frees an I/O buffer that was allocated by alloc_buffer.
475	*
476	* @param usb_ep the endpoint associated with the buffer
477	* @param buf address of the buffer
478	* @param dma The buffer's DMA address
479	* @param bytes The number of bytes of the buffer
480	*/
481	static void dwc_otg_pcd_free_buffer(struct usb_ep usb_ep, void buf,
482	dma_addr_t dma, unsigned bytes)
483	{
484	dwc_otg_pcd_ep_t *ep;
485	dwc_otg_pcd_t *pcd = 0;
486
487	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
488	pcd = ep->pcd;
489
490	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p,%0x,%d)\n", __func__, ep, buf, dma, bytes);
491
492	if (GET_CORE_IF(pcd)->dma_enable) {
493	dma_free_coherent (NULL, bytes, buf, dma);
494	}
495	else {
496	kfree(buf);
497	}
498	}
499
500
501	/**
502	* This function is used to submit an I/O Request to an EP.
503	*
504	* - When the request completes the request's completion callback
505	* is called to return the request to the driver.
506	* - An EP, except control EPs, may have multiple requests
507	* pending.
508	* - Once submitted the request cannot be examined or modified.
509	* - Each request is turned into one or more packets.
510	* - A BULK EP can queue any amount of data; the transfer is
511	* packetized.
512	* - Zero length Packets are specified with the request 'zero'
513	* flag.
514	*/
515	static int dwc_otg_pcd_ep_queue(struct usb_ep *usb_ep,
516	struct usb_request *usb_req,
517	#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
518	int gfp_flags
519	#else
520	gfp_t gfp_flags
521	#endif
522	)
523	{
524	int prevented = 0;
525	dwc_otg_pcd_request_t *req;
526	dwc_otg_pcd_ep_t *ep;
527	dwc_otg_pcd_t *pcd;
528	unsigned long flags = 0;
529	dwc_otg_core_if_t *_core_if;
530
531	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p,%d)\n",
532	__func__, usb_ep, usb_req, gfp_flags);
533
534	req = container_of(usb_req, dwc_otg_pcd_request_t, req);
535	if (!usb_req \|\| !usb_req->complete \|\| !usb_req->buf \|\|
536	!list_empty(&req->queue)) {
537	DWC_WARN("%s, bad params\n", __func__);
538	return -EINVAL;
539	}
540
541	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
542	if (!usb_ep \|\| (!ep->desc && ep->dwc_ep.num != 0)/* \|\| ep->stopped != 0*/) {
543	DWC_WARN("%s, bad ep\n", __func__);
544	return -EINVAL;
545	}
546
547	pcd = ep->pcd;
548	if (!pcd->driver \|\| pcd->gadget.speed == USB_SPEED_UNKNOWN) {
549	DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", pcd->gadget.speed);
550	DWC_WARN("%s, bogus device state\n", __func__);
551	return -ESHUTDOWN;
552	}
553
554
555	DWC_DEBUGPL(DBG_PCD, "%s queue req %p, len %d buf %p\n",
556	usb_ep->name, usb_req, usb_req->length, usb_req->buf);
557
558	if (!GET_CORE_IF(pcd)->core_params->opt) {
559	if (ep->dwc_ep.num != 0) {
560	DWC_ERROR("%s queue req %p, len %d buf %p\n",
561	usb_ep->name, usb_req, usb_req->length, usb_req->buf);
562	}
563	}
564
565	SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
566
567
568	/**************************************************
569	New add by kaiker ,for DMA mode bug
570	************************************************/
571	//by kaiker ,for RT3052 USB OTG device mode
572
573	_core_if = GET_CORE_IF(pcd);
574
575	if (_core_if->dma_enable)
576	{
577	usb_req->dma = virt_to_phys((void *)usb_req->buf);
578
579	if(ep->dwc_ep.is_in)
580	{
581	if(usb_req->length)
582	dma_cache_wback_inv((unsigned long)usb_req->buf, usb_req->length + 2);
583	}
584	}
585
586
587
588	#if defined(DEBUG) & defined(VERBOSE)
589	dump_msg(usb_req->buf, usb_req->length);
590	#endif
591
592	usb_req->status = -EINPROGRESS;
593	usb_req->actual = 0;
594
595	/*
596	* For EP0 IN without premature status, zlp is required?
597	*/
598	if (ep->dwc_ep.num == 0 && ep->dwc_ep.is_in) {
599	DWC_DEBUGPL(DBG_PCDV, "%s-OUT ZLP\n", usb_ep->name);
600	//_req->zero = 1;
601	}
602
603	/* Start the transfer */
604	if (list_empty(&ep->queue) && !ep->stopped) {
605	/* EP0 Transfer? */
606	if (ep->dwc_ep.num == 0) {
607	switch (pcd->ep0state) {
608	case EP0_IN_DATA_PHASE:
609	DWC_DEBUGPL(DBG_PCD,
610	"%s ep0: EP0_IN_DATA_PHASE\n",
611	__func__);
612	break;
613
614	case EP0_OUT_DATA_PHASE:
615	DWC_DEBUGPL(DBG_PCD,
616	"%s ep0: EP0_OUT_DATA_PHASE\n",
617	__func__);
618	if (pcd->request_config) {
619	/* Complete STATUS PHASE */
620	ep->dwc_ep.is_in = 1;
621	pcd->ep0state = EP0_IN_STATUS_PHASE;
622	}
623	break;
624
625	case EP0_IN_STATUS_PHASE:
626	DWC_DEBUGPL(DBG_PCD,
627	"%s ep0: EP0_IN_STATUS_PHASE\n",
628	__func__);
629	break;
630
631	default:
632	DWC_DEBUGPL(DBG_ANY, "ep0: odd state %d\n",
633	pcd->ep0state);
634	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
635	return -EL2HLT;
636	}
637	ep->dwc_ep.dma_addr = usb_req->dma;
638	ep->dwc_ep.start_xfer_buff = usb_req->buf;
639	ep->dwc_ep.xfer_buff = usb_req->buf;
640	ep->dwc_ep.xfer_len = usb_req->length;
641	ep->dwc_ep.xfer_count = 0;
642	ep->dwc_ep.sent_zlp = 0;
643	ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
644
645	if(usb_req->zero) {
646	if((ep->dwc_ep.xfer_len % ep->dwc_ep.maxpacket == 0)
647	&& (ep->dwc_ep.xfer_len != 0)) {
648	ep->dwc_ep.sent_zlp = 1;
649	}
650
651	}
652
653	dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep->dwc_ep);
654	}
655	else {
656
657	uint32_t max_transfer = GET_CORE_IF(ep->pcd)->core_params->max_transfer_size;
658
659	/* Setup and start the Transfer */
660	ep->dwc_ep.dma_addr = usb_req->dma;
661	ep->dwc_ep.start_xfer_buff = usb_req->buf;
662	ep->dwc_ep.xfer_buff = usb_req->buf;
663	ep->dwc_ep.sent_zlp = 0;
664	ep->dwc_ep.total_len = usb_req->length;
665	ep->dwc_ep.xfer_len = 0;
666	ep->dwc_ep.xfer_count = 0;
667
668	if(max_transfer > MAX_TRANSFER_SIZE) {
669	ep->dwc_ep.maxxfer = max_transfer - (max_transfer % ep->dwc_ep.maxpacket);
670	} else {
671	ep->dwc_ep.maxxfer = max_transfer;
672	}
673
674	if(usb_req->zero) {
675	if((ep->dwc_ep.total_len % ep->dwc_ep.maxpacket == 0)
676	&& (ep->dwc_ep.total_len != 0)) {
677	ep->dwc_ep.sent_zlp = 1;
678	}
679
680	}
681	dwc_otg_ep_start_transfer(GET_CORE_IF(pcd), &ep->dwc_ep);
682	}
683	}
684
685	if ((req != 0) \|\| prevented) {
686	++pcd->request_pending;
687	list_add_tail(&req->queue, &ep->queue);
688	if (ep->dwc_ep.is_in && ep->stopped && !(GET_CORE_IF(pcd)->dma_enable)) {
689	/** @todo NGS Create a function for this. */
690	diepmsk_data_t diepmsk = { .d32 = 0};
691	diepmsk.b.intktxfemp = 1;
692	if(&GET_CORE_IF(pcd)->multiproc_int_enable) {
693	dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepeachintmsk[ep->dwc_ep.num],
694	0, diepmsk.d32);
695	} else {
696	dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepmsk, 0, diepmsk.d32);
697	}
698	}
699	}
700
701	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
702	return 0;
703	}
704
705	/**
706	* This function cancels an I/O request from an EP.
707	*/
708	static int dwc_otg_pcd_ep_dequeue(struct usb_ep *usb_ep,
709	struct usb_request *usb_req)
710	{
711	dwc_otg_pcd_request_t *req;
712	dwc_otg_pcd_ep_t *ep;
713	dwc_otg_pcd_t *pcd;
714	unsigned long flags;
715
716	DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p)\n", __func__, usb_ep, usb_req);
717
718	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
719	if (!usb_ep \|\| !usb_req \|\| (!ep->desc && ep->dwc_ep.num != 0)) {
720	DWC_WARN("%s, bad argument\n", __func__);
721	return -EINVAL;
722	}
723	pcd = ep->pcd;
724	if (!pcd->driver \|\| pcd->gadget.speed == USB_SPEED_UNKNOWN) {
725	DWC_WARN("%s, bogus device state\n", __func__);
726	return -ESHUTDOWN;
727	}
728
729	SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
730	DWC_DEBUGPL(DBG_PCDV, "%s %s %s %p\n", __func__, usb_ep->name,
731	ep->dwc_ep.is_in ? "IN" : "OUT",
732	usb_req);
733
734	/* make sure it's actually queued on this endpoint */
735	list_for_each_entry(req, &ep->queue, queue)
736	{
737	if (&req->req == usb_req) {
738	break;
739	}
740	}
741
742	if (&req->req != usb_req) {
743	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
744	return -EINVAL;
745	}
746
747	if (!list_empty(&req->queue)) {
748	dwc_otg_request_done(ep, req, -ECONNRESET);
749	}
750	else {
751	req = 0;
752	}
753
754	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
755
756	return req ? 0 : -EOPNOTSUPP;
757	}
758
759	/**
760	* usb_ep_set_halt stalls an endpoint.
761	*
762	* usb_ep_clear_halt clears an endpoint halt and resets its data
763	* toggle.
764	*
765	* Both of these functions are implemented with the same underlying
766	* function. The behavior depends on the value argument.
767	*
768	* @param[in] usb_ep the Endpoint to halt or clear halt.
769	* @param[in] value
770	* - 0 means clear_halt.
771	* - 1 means set_halt,
772	* - 2 means clear stall lock flag.
773	* - 3 means set stall lock flag.
774	*/
775	static int dwc_otg_pcd_ep_set_halt(struct usb_ep *usb_ep, int value)
776	{
777	int retval = 0;
778	unsigned long flags;
779	dwc_otg_pcd_ep_t *ep = 0;
780
781
782	DWC_DEBUGPL(DBG_PCD,"HALT %s %d\n", usb_ep->name, value);
783
784	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
785
786	if (!usb_ep \|\| (!ep->desc && ep != &ep->pcd->ep0) \|\|
787	ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
788	DWC_WARN("%s, bad ep\n", __func__);
789	return -EINVAL;
790	}
791
792	SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
793	if (!list_empty(&ep->queue)) {
794	DWC_WARN("%s() %s XFer In process\n", __func__, usb_ep->name);
795	retval = -EAGAIN;
796	}
797	else if (value == 0) {
798	dwc_otg_ep_clear_stall(ep->pcd->otg_dev->core_if,
799	&ep->dwc_ep);
800	}
801	else if(value == 1) {
802	if (ep->dwc_ep.is_in == 1 && ep->pcd->otg_dev->core_if->dma_desc_enable) {
803	dtxfsts_data_t txstatus;
804	fifosize_data_t txfifosize;
805
806	txfifosize.d32 = dwc_read_reg32(&ep->pcd->otg_dev->core_if->core_global_regs->dptxfsiz_dieptxf[ep->dwc_ep.tx_fifo_num]);
807	txstatus.d32 = dwc_read_reg32(&ep->pcd->otg_dev->core_if->dev_if->in_ep_regs[ep->dwc_ep.num]->dtxfsts);
808
809	if(txstatus.b.txfspcavail < txfifosize.b.depth) {
810	DWC_WARN("%s() %s Data In Tx Fifo\n", __func__, usb_ep->name);
811	retval = -EAGAIN;
812	}
813	else {
814	if (ep->dwc_ep.num == 0) {
815	ep->pcd->ep0state = EP0_STALL;
816	}
817
818	ep->stopped = 1;
819	dwc_otg_ep_set_stall(ep->pcd->otg_dev->core_if,
820	&ep->dwc_ep);
821	}
822	}
823	else {
824	if (ep->dwc_ep.num == 0) {
825	ep->pcd->ep0state = EP0_STALL;
826	}
827
828	ep->stopped = 1;
829	dwc_otg_ep_set_stall(ep->pcd->otg_dev->core_if,
830	&ep->dwc_ep);
831	}
832	}
833	else if (value == 2) {
834	ep->dwc_ep.stall_clear_flag = 0;
835	}
836	else if (value == 3) {
837	ep->dwc_ep.stall_clear_flag = 1;
838	}
839
840	SPIN_UNLOCK_IRQRESTORE(&ep->pcd->lock, flags);
841	return retval;
842	}
843
844	/**
845	* This function allocates a DMA Descriptor chain for the Endpoint
846	* buffer to be used for a transfer to/from the specified endpoint.
847	*/
848	dwc_otg_dma_desc_t* dwc_otg_ep_alloc_desc_chain(uint32_t * dma_desc_addr, uint32_t count)
849	{
850
851	return dma_alloc_coherent(NULL, count * sizeof(dwc_otg_dma_desc_t), dma_desc_addr, GFP_KERNEL);
852	}
853
854	/**
855	* This function frees a DMA Descriptor chain that was allocated by ep_alloc_desc.
856	*/
857	void dwc_otg_ep_free_desc_chain(dwc_otg_dma_desc_t* desc_addr, uint32_t dma_desc_addr, uint32_t count)
858	{
859	dma_free_coherent(NULL, count * sizeof(dwc_otg_dma_desc_t), desc_addr, dma_desc_addr);
860	}
861
862	#ifdef DWC_EN_ISOC
863
864	/**
865	* This function initializes a descriptor chain for Isochronous transfer
866	*
867	* @param core_if Programming view of DWC_otg controller.
868	* @param dwc_ep The EP to start the transfer on.
869	*
870	*/
871	void dwc_otg_iso_ep_start_ddma_transfer(dwc_otg_core_if_t core_if, dwc_ep_t dwc_ep)
872	{
873
874	dsts_data_t dsts = { .d32 = 0};
875	depctl_data_t depctl = { .d32 = 0 };
876	volatile uint32_t *addr;
877	int i, j;
878
879	if(dwc_ep->is_in)
880	dwc_ep->desc_cnt = dwc_ep->buf_proc_intrvl / dwc_ep->bInterval;
881	else
882	dwc_ep->desc_cnt = dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / dwc_ep->bInterval;
883
884
885	/** Allocate descriptors for double buffering */
886	dwc_ep->iso_desc_addr = dwc_otg_ep_alloc_desc_chain(&dwc_ep->iso_dma_desc_addr,dwc_ep->desc_cnt*2);
887	if(dwc_ep->desc_addr) {
888	DWC_WARN("%s, can't allocate DMA descriptor chain\n", __func__);
889	return;
890	}
891
892	dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts);
893
894	/** ISO OUT EP */
895	if(dwc_ep->is_in == 0) {
896	desc_sts_data_t sts = { .d32 =0 };
897	dwc_otg_dma_desc_t* dma_desc = dwc_ep->iso_desc_addr;
898	dma_addr_t dma_ad;
899	uint32_t data_per_desc;
900	dwc_otg_dev_out_ep_regs_t *out_regs =
901	core_if->dev_if->out_ep_regs[dwc_ep->num];
902	int offset;
903
904	addr = &core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl;
905	dma_ad = (dma_addr_t)dwc_read_reg32(&(out_regs->doepdma));
906
907	/** Buffer 0 descriptors setup */
908	dma_ad = dwc_ep->dma_addr0;
909
910	sts.b_iso_out.bs = BS_HOST_READY;
911	sts.b_iso_out.rxsts = 0;
912	sts.b_iso_out.l = 0;
913	sts.b_iso_out.sp = 0;
914	sts.b_iso_out.ioc = 0;
915	sts.b_iso_out.pid = 0;
916	sts.b_iso_out.framenum = 0;
917
918	offset = 0;
919	for(i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; i+= dwc_ep->pkt_per_frm)
920	{
921
922	for(j = 0; j < dwc_ep->pkt_per_frm; ++j)
923	{
924	data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
925	dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
926
927	data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
928	sts.b_iso_out.rxbytes = data_per_desc;
929	writel((uint32_t)dma_ad, &dma_desc->buf);
930	writel(sts.d32, &dma_desc->status);
931
932	offset += data_per_desc;
933	dma_desc ++;
934	(uint32_t)dma_ad += data_per_desc;
935	}
936	}
937
938	for(j = 0; j < dwc_ep->pkt_per_frm - 1; ++j)
939	{
940	data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
941	dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
942	data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
943	sts.b_iso_out.rxbytes = data_per_desc;
944	writel((uint32_t)dma_ad, &dma_desc->buf);
945	writel(sts.d32, &dma_desc->status);
946
947	offset += data_per_desc;
948	dma_desc ++;
949	(uint32_t)dma_ad += data_per_desc;
950	}
951
952	sts.b_iso_out.ioc = 1;
953	data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
954	dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
955	data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
956	sts.b_iso_out.rxbytes = data_per_desc;
957
958	writel((uint32_t)dma_ad, &dma_desc->buf);
959	writel(sts.d32, &dma_desc->status);
960	dma_desc ++;
961
962	/** Buffer 1 descriptors setup */
963	sts.b_iso_out.ioc = 0;
964	dma_ad = dwc_ep->dma_addr1;
965
966	offset = 0;
967	for(i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; i+= dwc_ep->pkt_per_frm)
968	{
969	for(j = 0; j < dwc_ep->pkt_per_frm; ++j)
970	{
971	data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
972	dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
973	data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
974	sts.b_iso_out.rxbytes = data_per_desc;
975	writel((uint32_t)dma_ad, &dma_desc->buf);
976	writel(sts.d32, &dma_desc->status);
977
978	offset += data_per_desc;
979	dma_desc ++;
980	(uint32_t)dma_ad += data_per_desc;
981	}
982	}
983	for(j = 0; j < dwc_ep->pkt_per_frm - 1; ++j)
984	{
985	data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
986	dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
987	data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
988	sts.b_iso_out.rxbytes = data_per_desc;
989	writel((uint32_t)dma_ad, &dma_desc->buf);
990	writel(sts.d32, &dma_desc->status);
991
992	offset += data_per_desc;
993	dma_desc ++;
994	(uint32_t)dma_ad += data_per_desc;
995	}
996
997	sts.b_iso_out.ioc = 1;
998	sts.b_iso_out.l = 1;
999	data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
1000	dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
1001	data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
1002	sts.b_iso_out.rxbytes = data_per_desc;
1003
1004	writel((uint32_t)dma_ad, &dma_desc->buf);
1005	writel(sts.d32, &dma_desc->status);
1006
1007	dwc_ep->next_frame = 0;
1008
1009	/** Write dma_ad into DOEPDMA register */
1010	dwc_write_reg32(&(out_regs->doepdma),(uint32_t)dwc_ep->iso_dma_desc_addr);
1011
1012	}
1013	/** ISO IN EP */
1014	else {
1015	desc_sts_data_t sts = { .d32 =0 };
1016	dwc_otg_dma_desc_t* dma_desc = dwc_ep->iso_desc_addr;
1017	dma_addr_t dma_ad;
1018	dwc_otg_dev_in_ep_regs_t *in_regs =
1019	core_if->dev_if->in_ep_regs[dwc_ep->num];
1020	unsigned int frmnumber;
1021	fifosize_data_t txfifosize,rxfifosize;
1022
1023	txfifosize.d32 = dwc_read_reg32(&core_if->dev_if->in_ep_regs[dwc_ep->num]->dtxfsts);
1024	rxfifosize.d32 = dwc_read_reg32(&core_if->core_global_regs->grxfsiz);
1025
1026
1027	addr = &core_if->dev_if->in_ep_regs[dwc_ep->num]->diepctl;
1028
1029	dma_ad = dwc_ep->dma_addr0;
1030
1031	dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts);
1032
1033	sts.b_iso_in.bs = BS_HOST_READY;
1034	sts.b_iso_in.txsts = 0;
1035	sts.b_iso_in.sp = (dwc_ep->data_per_frame % dwc_ep->maxpacket)? 1 : 0;
1036	sts.b_iso_in.ioc = 0;
1037	sts.b_iso_in.pid = dwc_ep->pkt_per_frm;
1038
1039
1040	frmnumber = dwc_ep->next_frame;
1041
1042	sts.b_iso_in.framenum = frmnumber;
1043	sts.b_iso_in.txbytes = dwc_ep->data_per_frame;
1044	sts.b_iso_in.l = 0;
1045
1046	/** Buffer 0 descriptors setup */
1047	for(i = 0; i < dwc_ep->desc_cnt - 1; i++)
1048	{
1049	writel((uint32_t)dma_ad, &dma_desc->buf);
1050	writel(sts.d32, &dma_desc->status);
1051	dma_desc ++;
1052
1053	(uint32_t)dma_ad += dwc_ep->data_per_frame;
1054	sts.b_iso_in.framenum += dwc_ep->bInterval;
1055	}
1056
1057	sts.b_iso_in.ioc = 1;
1058	writel((uint32_t)dma_ad, &dma_desc->buf);
1059	writel(sts.d32, &dma_desc->status);
1060	++dma_desc;
1061
1062	/** Buffer 1 descriptors setup */
1063	sts.b_iso_in.ioc = 0;
1064	dma_ad = dwc_ep->dma_addr1;
1065
1066	for(i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; i+= dwc_ep->pkt_per_frm)
1067	{
1068	writel((uint32_t)dma_ad, &dma_desc->buf);
1069	writel(sts.d32, &dma_desc->status);
1070	dma_desc ++;
1071
1072	(uint32_t)dma_ad += dwc_ep->data_per_frame;
1073	sts.b_iso_in.framenum += dwc_ep->bInterval;
1074
1075	sts.b_iso_in.ioc = 0;
1076	}
1077	sts.b_iso_in.ioc = 1;
1078	sts.b_iso_in.l = 1;
1079
1080	writel((uint32_t)dma_ad, &dma_desc->buf);
1081	writel(sts.d32, &dma_desc->status);
1082
1083	dwc_ep->next_frame = sts.b_iso_in.framenum + dwc_ep->bInterval;
1084
1085	/** Write dma_ad into diepdma register */
1086	dwc_write_reg32(&(in_regs->diepdma),(uint32_t)dwc_ep->iso_dma_desc_addr);
1087	}
1088	/** Enable endpoint, clear nak */
1089	depctl.d32 = 0;
1090	depctl.b.epena = 1;
1091	depctl.b.usbactep = 1;
1092	depctl.b.cnak = 1;
1093
1094	dwc_modify_reg32(addr, depctl.d32,depctl.d32);
1095	depctl.d32 = dwc_read_reg32(addr);
1096	}
1097
1098	/**
1099	* This function initializes a descriptor chain for Isochronous transfer
1100	*
1101	* @param core_if Programming view of DWC_otg controller.
1102	* @param ep The EP to start the transfer on.
1103	*
1104	*/
1105
1106	void dwc_otg_iso_ep_start_buf_transfer(dwc_otg_core_if_t core_if, dwc_ep_t ep)
1107	{
1108	depctl_data_t depctl = { .d32 = 0 };
1109	volatile uint32_t *addr;
1110
1111
1112	if(ep->is_in) {
1113	addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
1114	} else {
1115	addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
1116	}
1117
1118
1119	if(core_if->dma_enable == 0 \|\| core_if->dma_desc_enable!= 0) {
1120	return;
1121	} else {
1122	deptsiz_data_t deptsiz = { .d32 = 0 };
1123
1124	ep->xfer_len = ep->data_per_frame * ep->buf_proc_intrvl / ep->bInterval;
1125	ep->pkt_cnt = (ep->xfer_len - 1 + ep->maxpacket) /
1126	ep->maxpacket;
1127	ep->xfer_count = 0;
1128	ep->xfer_buff = (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
1129	ep->dma_addr = (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
1130
1131	if(ep->is_in) {
1132	/* Program the transfer size and packet count
1133	* as follows: xfersize = N * maxpacket +
1134	* short_packet pktcnt = N + (short_packet
1135	* exist ? 1 : 0)
1136	*/
1137	deptsiz.b.mc = ep->pkt_per_frm;
1138	deptsiz.b.xfersize = ep->xfer_len;
1139	deptsiz.b.pktcnt =
1140	(ep->xfer_len - 1 + ep->maxpacket) /
1141	ep->maxpacket;
1142	dwc_write_reg32(&core_if->dev_if->in_ep_regs[ep->num]->dieptsiz, deptsiz.d32);
1143
1144	/* Write the DMA register */
1145	dwc_write_reg32 (&(core_if->dev_if->in_ep_regs[ep->num]->diepdma), (uint32_t)ep->dma_addr);
1146
1147	} else {
1148	deptsiz.b.pktcnt =
1149	(ep->xfer_len + (ep->maxpacket - 1)) /
1150	ep->maxpacket;
1151	deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket;
1152
1153	dwc_write_reg32(&core_if->dev_if->out_ep_regs[ep->num]->doeptsiz, deptsiz.d32);
1154
1155	/* Write the DMA register */
1156	dwc_write_reg32 (&(core_if->dev_if->out_ep_regs[ep->num]->doepdma), (uint32_t)ep->dma_addr);
1157
1158	}
1159	/** Enable endpoint, clear nak */
1160	depctl.d32 = 0;
1161	dwc_modify_reg32(addr, depctl.d32,depctl.d32);
1162
1163	depctl.b.epena = 1;
1164	depctl.b.cnak = 1;
1165
1166	dwc_modify_reg32(addr, depctl.d32,depctl.d32);
1167	}
1168	}
1169
1170
1171	/**
1172	* This function does the setup for a data transfer for an EP and
1173	* starts the transfer. For an IN transfer, the packets will be
1174	* loaded into the appropriate Tx FIFO in the ISR. For OUT transfers,
1175	* the packets are unloaded from the Rx FIFO in the ISR. the ISR.
1176	*
1177	* @param core_if Programming view of DWC_otg controller.
1178	* @param ep The EP to start the transfer on.
1179	*/
1180
1181	void dwc_otg_iso_ep_start_transfer(dwc_otg_core_if_t core_if, dwc_ep_t ep)
1182	{
1183	if(core_if->dma_enable) {
1184	if(core_if->dma_desc_enable) {
1185	if(ep->is_in) {
1186	ep->desc_cnt = ep->pkt_cnt / ep->pkt_per_frm;
1187	} else {
1188	ep->desc_cnt = ep->pkt_cnt;
1189	}
1190	dwc_otg_iso_ep_start_ddma_transfer(core_if, ep);
1191	} else {
1192	if(core_if->pti_enh_enable) {
1193	dwc_otg_iso_ep_start_buf_transfer(core_if, ep);
1194	} else {
1195	ep->cur_pkt_addr = (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
1196	ep->cur_pkt_dma_addr = (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
1197	dwc_otg_iso_ep_start_frm_transfer(core_if, ep);
1198	}
1199	}
1200	} else {
1201	ep->cur_pkt_addr = (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
1202	ep->cur_pkt_dma_addr = (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
1203	dwc_otg_iso_ep_start_frm_transfer(core_if, ep);
1204	}
1205	}
1206
1207	/**
1208	* This function does the setup for a data transfer for an EP and
1209	* starts the transfer. For an IN transfer, the packets will be
1210	* loaded into the appropriate Tx FIFO in the ISR. For OUT transfers,
1211	* the packets are unloaded from the Rx FIFO in the ISR. the ISR.
1212	*
1213	* @param core_if Programming view of DWC_otg controller.
1214	* @param ep The EP to start the transfer on.
1215	*/
1216
1217	void dwc_otg_iso_ep_stop_transfer(dwc_otg_core_if_t core_if, dwc_ep_t ep)
1218	{
1219	depctl_data_t depctl = { .d32 = 0 };
1220	volatile uint32_t *addr;
1221
1222	if(ep->is_in == 1) {
1223	addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
1224	}
1225	else {
1226	addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
1227	}
1228
1229	/* disable the ep */
1230	depctl.d32 = dwc_read_reg32(addr);
1231
1232	depctl.b.epdis = 1;
1233	depctl.b.snak = 1;
1234
1235	dwc_write_reg32(addr, depctl.d32);
1236
1237	if(core_if->dma_desc_enable &&
1238	ep->iso_desc_addr && ep->iso_dma_desc_addr) {
1239	dwc_otg_ep_free_desc_chain(ep->iso_desc_addr,ep->iso_dma_desc_addr,ep->desc_cnt * 2);
1240	}
1241
1242	/* reset varibales */
1243	ep->dma_addr0 = 0;
1244	ep->dma_addr1 = 0;
1245	ep->xfer_buff0 = 0;
1246	ep->xfer_buff1 = 0;
1247	ep->data_per_frame = 0;
1248	ep->data_pattern_frame = 0;
1249	ep->sync_frame = 0;
1250	ep->buf_proc_intrvl = 0;
1251	ep->bInterval = 0;
1252	ep->proc_buf_num = 0;
1253	ep->pkt_per_frm = 0;
1254	ep->pkt_per_frm = 0;
1255	ep->desc_cnt = 0;
1256	ep->iso_desc_addr = 0;
1257	ep->iso_dma_desc_addr = 0;
1258	}
1259
1260
1261	/**
1262	* This function is used to submit an ISOC Transfer Request to an EP.
1263	*
1264	* - Every time a sync period completes the request's completion callback
1265	* is called to provide data to the gadget driver.
1266	* - Once submitted the request cannot be modified.
1267	* - Each request is turned into periodic data packets untill ISO
1268	* Transfer is stopped..
1269	*/
1270	static int dwc_otg_pcd_iso_ep_start(struct usb_ep usb_ep, struct usb_iso_request req,
1271	#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
1272	int gfp_flags
1273	#else
1274	gfp_t gfp_flags
1275	#endif
1276	)
1277	{
1278	dwc_otg_pcd_ep_t *ep;
1279	dwc_otg_pcd_t *pcd;
1280	dwc_ep_t *dwc_ep;
1281	unsigned long flags = 0;
1282	int32_t frm_data;
1283	dwc_otg_core_if_t *core_if;
1284	dcfg_data_t dcfg;
1285	dsts_data_t dsts;
1286
1287
1288	if (!req \|\| !req->process_buffer \|\| !req->buf0 \|\| !req->buf1) {
1289	DWC_WARN("%s, bad params\n", __func__);
1290	return -EINVAL;
1291	}
1292
1293	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
1294
1295	if (!usb_ep \|\| !ep->desc \|\| ep->dwc_ep.num == 0) {
1296	DWC_WARN("%s, bad ep\n", __func__);
1297	return -EINVAL;
1298	}
1299
1300	pcd = ep->pcd;
1301	core_if = GET_CORE_IF(pcd);
1302
1303	dcfg.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dcfg);
1304
1305	if (!pcd->driver \|\| pcd->gadget.speed == USB_SPEED_UNKNOWN) {
1306	DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", pcd->gadget.speed);
1307	DWC_WARN("%s, bogus device state\n", __func__);
1308	return -ESHUTDOWN;
1309	}
1310
1311	SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
1312
1313	dwc_ep = &ep->dwc_ep;
1314
1315	if(ep->iso_req) {
1316	DWC_WARN("%s, iso request in progress\n", __func__);
1317	}
1318	req->status = -EINPROGRESS;
1319
1320	dwc_ep->dma_addr0 = req->dma0;
1321	dwc_ep->dma_addr1 = req->dma1;
1322
1323	dwc_ep->xfer_buff0 = req->buf0;
1324	dwc_ep->xfer_buff1 = req->buf1;
1325
1326	ep->iso_req = req;
1327
1328	dwc_ep->data_per_frame = req->data_per_frame;
1329
1330	/** @todo - pattern data support is to be implemented in the future */
1331	dwc_ep->data_pattern_frame = req->data_pattern_frame;
1332	dwc_ep->sync_frame = req->sync_frame;
1333
1334	dwc_ep->buf_proc_intrvl = req->buf_proc_intrvl;
1335
1336	dwc_ep->bInterval = 1 << (ep->desc->bInterval - 1);
1337
1338	dwc_ep->proc_buf_num = 0;
1339
1340	dwc_ep->pkt_per_frm = 0;
1341	frm_data = ep->dwc_ep.data_per_frame;
1342	while(frm_data > 0) {
1343	dwc_ep->pkt_per_frm++;
1344	frm_data -= ep->dwc_ep.maxpacket;
1345	}
1346
1347	dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts);
1348
1349	if(req->flags & USB_REQ_ISO_ASAP) {
1350	dwc_ep->next_frame = dsts.b.soffn + 1;
1351	if(dwc_ep->bInterval != 1){
1352	dwc_ep->next_frame = dwc_ep->next_frame + (dwc_ep->bInterval - 1 - dwc_ep->next_frame % dwc_ep->bInterval);
1353	}
1354	} else {
1355	dwc_ep->next_frame = req->start_frame;
1356	}
1357
1358
1359	if(!core_if->pti_enh_enable) {
1360	dwc_ep->pkt_cnt = dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / dwc_ep->bInterval;
1361	} else {
1362	dwc_ep->pkt_cnt =
1363	(dwc_ep->data_per_frame * (dwc_ep->buf_proc_intrvl / dwc_ep->bInterval)
1364	- 1 + dwc_ep->maxpacket) / dwc_ep->maxpacket;
1365	}
1366
1367	if(core_if->dma_desc_enable) {
1368	dwc_ep->desc_cnt =
1369	dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / dwc_ep->bInterval;
1370	}
1371
1372	dwc_ep->pkt_info = kmalloc(sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt, GFP_KERNEL);
1373	if(!dwc_ep->pkt_info) {
1374	return -ENOMEM;
1375	}
1376	if(core_if->pti_enh_enable) {
1377	memset(dwc_ep->pkt_info, 0, sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt);
1378	}
1379
1380	dwc_ep->cur_pkt = 0;
1381
1382	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
1383
1384	dwc_otg_iso_ep_start_transfer(core_if, dwc_ep);
1385
1386	return 0;
1387	}
1388
1389	/**
1390	* This function stops ISO EP Periodic Data Transfer.
1391	*/
1392	static int dwc_otg_pcd_iso_ep_stop(struct usb_ep usb_ep, struct usb_iso_request req)
1393	{
1394	dwc_otg_pcd_ep_t *ep;
1395	dwc_otg_pcd_t *pcd;
1396	dwc_ep_t *dwc_ep;
1397	unsigned long flags;
1398
1399	ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
1400
1401	if (!usb_ep \|\| !ep->desc \|\| ep->dwc_ep.num == 0) {
1402	DWC_WARN("%s, bad ep\n", __func__);
1403	return -EINVAL;
1404	}
1405
1406	pcd = ep->pcd;
1407
1408	if (!pcd->driver \|\| pcd->gadget.speed == USB_SPEED_UNKNOWN) {
1409	DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", pcd->gadget.speed);
1410	DWC_WARN("%s, bogus device state\n", __func__);
1411	return -ESHUTDOWN;
1412	}
1413
1414	dwc_ep = &ep->dwc_ep;
1415
1416	dwc_otg_iso_ep_stop_transfer(GET_CORE_IF(pcd), dwc_ep);
1417
1418	kfree(dwc_ep->pkt_info);
1419
1420	SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
1421
1422	if(ep->iso_req != req) {
1423	return -EINVAL;
1424	}
1425
1426	req->status = -ECONNRESET;
1427
1428	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
1429
1430
1431	ep->iso_req = 0;
1432
1433	return 0;
1434	}
1435
1436	/**
1437	* This function is used for perodical data exchnage between PCD and gadget drivers.
1438	* for Isochronous EPs
1439	*
1440	* - Every time a sync period completes this function is called to
1441	* perform data exchange between PCD and gadget
1442	*/
1443	void dwc_otg_iso_buffer_done(dwc_otg_pcd_ep_t ep, dwc_otg_pcd_iso_request_t req)
1444	{
1445	int i;
1446	struct usb_gadget_iso_packet_descriptor *iso_packet;
1447	dwc_ep_t *dwc_ep;
1448
1449	dwc_ep = &ep->dwc_ep;
1450
1451	if(ep->iso_req->status == -ECONNRESET) {
1452	DWC_PRINT("Device has already disconnected\n");
1453	/Device has been disconnected/
1454	return;
1455	}
1456
1457	if(dwc_ep->proc_buf_num != 0) {
1458	iso_packet = ep->iso_req->iso_packet_desc0;
1459	}
1460
1461	else {
1462	iso_packet = ep->iso_req->iso_packet_desc1;
1463	}
1464
1465	/* Fill in ISOC packets descriptors & pass to gadget driver*/
1466
1467	for(i = 0; i < dwc_ep->pkt_cnt; ++i) {
1468	iso_packet[i].status = dwc_ep->pkt_info[i].status;
1469	iso_packet[i].offset = dwc_ep->pkt_info[i].offset;
1470	iso_packet[i].actual_length = dwc_ep->pkt_info[i].length;
1471	dwc_ep->pkt_info[i].status = 0;
1472	dwc_ep->pkt_info[i].offset = 0;
1473	dwc_ep->pkt_info[i].length = 0;
1474	}
1475
1476	/* Call callback function to process data buffer */
1477	ep->iso_req->status = 0;/* success */
1478
1479	SPIN_UNLOCK(&ep->pcd->lock);
1480	ep->iso_req->process_buffer(&ep->ep, ep->iso_req);
1481	SPIN_LOCK(&ep->pcd->lock);
1482	}
1483
1484
1485	static struct usb_iso_request dwc_otg_pcd_alloc_iso_request(struct usb_ep ep,int packets,
1486	#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
1487	int gfp_flags
1488	#else
1489	gfp_t gfp_flags
1490	#endif
1491	)
1492	{
1493	struct usb_iso_request *pReq = NULL;
1494	uint32_t req_size;
1495
1496
1497	req_size = sizeof(struct usb_iso_request);
1498	req_size += (2 * packets * (sizeof(struct usb_gadget_iso_packet_descriptor)));
1499
1500
1501	pReq = kmalloc(req_size, gfp_flags);
1502	if (!pReq) {
1503	DWC_WARN("%s, can't allocate Iso Request\n", __func__);
1504	return 0;
1505	}
1506	pReq->iso_packet_desc0 = (void*) (pReq + 1);
1507
1508	pReq->iso_packet_desc1 = pReq->iso_packet_desc0 + packets;
1509
1510	return pReq;
1511	}
1512
1513	static void dwc_otg_pcd_free_iso_request(struct usb_ep ep, struct usb_iso_request req)
1514	{
1515	kfree(req);
1516	}
1517
1518	static struct usb_isoc_ep_ops dwc_otg_pcd_ep_ops =
1519	{
1520	.ep_ops =
1521	{
1522	.enable = dwc_otg_pcd_ep_enable,
1523	.disable = dwc_otg_pcd_ep_disable,
1524
1525	.alloc_request = dwc_otg_pcd_alloc_request,
1526	.free_request = dwc_otg_pcd_free_request,
1527
1528	.alloc_buffer = dwc_otg_pcd_alloc_buffer,
1529	.free_buffer = dwc_otg_pcd_free_buffer,
1530
1531	.queue = dwc_otg_pcd_ep_queue,
1532	.dequeue = dwc_otg_pcd_ep_dequeue,
1533
1534	.set_halt = dwc_otg_pcd_ep_set_halt,
1535	.fifo_status = 0,
1536	.fifo_flush = 0,
1537	},
1538	.iso_ep_start = dwc_otg_pcd_iso_ep_start,
1539	.iso_ep_stop = dwc_otg_pcd_iso_ep_stop,
1540	.alloc_iso_request = dwc_otg_pcd_alloc_iso_request,
1541	.free_iso_request = dwc_otg_pcd_free_iso_request,
1542	};
1543
1544	#else
1545
1546
1547	static struct usb_ep_ops dwc_otg_pcd_ep_ops =
1548	{
1549	.enable = dwc_otg_pcd_ep_enable,
1550	.disable = dwc_otg_pcd_ep_disable,
1551
1552	.alloc_request = dwc_otg_pcd_alloc_request,
1553	.free_request = dwc_otg_pcd_free_request,
1554
1555	.alloc_buffer = dwc_otg_pcd_alloc_buffer,
1556	.free_buffer = dwc_otg_pcd_free_buffer,
1557
1558	.queue = dwc_otg_pcd_ep_queue,
1559	.dequeue = dwc_otg_pcd_ep_dequeue,
1560
1561	.set_halt = dwc_otg_pcd_ep_set_halt,
1562	.fifo_status = 0,
1563	.fifo_flush = 0,
1564
1565
1566	};
1567
1568	#endif /* DWC_EN_ISOC */
1569	/* Gadget Operations */
1570	/**
1571	* The following gadget operations will be implemented in the DWC_otg
1572	* PCD. Functions in the API that are not described below are not
1573	* implemented.
1574	*
1575	* The Gadget API provides wrapper functions for each of the function
1576	* pointers defined in usb_gadget_ops. The Gadget Driver calls the
1577	* wrapper function, which then calls the underlying PCD function. The
1578	* following sections are named according to the wrapper functions
1579	* (except for ioctl, which doesn't have a wrapper function). Within
1580	* each section, the corresponding DWC_otg PCD function name is
1581	* specified.
1582	*
1583	*/
1584
1585	/**
1586	*Gets the USB Frame number of the last SOF.
1587	*/
1588	static int dwc_otg_pcd_get_frame(struct usb_gadget *gadget)
1589	{
1590	dwc_otg_pcd_t *pcd;
1591
1592	DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, gadget);
1593
1594	if (gadget == 0) {
1595	return -ENODEV;
1596	}
1597	else {
1598	pcd = container_of(gadget, dwc_otg_pcd_t, gadget);
1599	dwc_otg_get_frame_number(GET_CORE_IF(pcd));
1600	}
1601
1602	return 0;
1603	}
1604
1605	void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t *pcd)
1606	{
1607	uint32_t addr = (uint32_t )&(GET_CORE_IF(pcd)->core_global_regs->gotgctl);
1608	gotgctl_data_t mem;
1609	gotgctl_data_t val;
1610
1611	val.d32 = dwc_read_reg32(addr);
1612	if (val.b.sesreq) {
1613	DWC_ERROR("Session Request Already active!\n");
1614	return;
1615	}
1616
1617	DWC_NOTICE("Session Request Initated\n");
1618	mem.d32 = dwc_read_reg32(addr);
1619	mem.b.sesreq = 1;
1620	dwc_write_reg32(addr, mem.d32);
1621
1622	/* Start the SRP timer */
1623	dwc_otg_pcd_start_srp_timer(pcd);
1624	return;
1625	}
1626
1627	void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t *pcd, int set)
1628	{
1629	dctl_data_t dctl = {.d32=0};
1630	volatile uint32_t *addr = &(GET_CORE_IF(pcd)->dev_if->dev_global_regs->dctl);
1631
1632	if (dwc_otg_is_device_mode(GET_CORE_IF(pcd))) {
1633	if (pcd->remote_wakeup_enable) {
1634	if (set) {
1635	dctl.b.rmtwkupsig = 1;
1636	dwc_modify_reg32(addr, 0, dctl.d32);
1637	DWC_DEBUGPL(DBG_PCD, "Set Remote Wakeup\n");
1638	mdelay(1);
1639	dwc_modify_reg32(addr, dctl.d32, 0);
1640	DWC_DEBUGPL(DBG_PCD, "Clear Remote Wakeup\n");
1641	}
1642	else {
1643	}
1644	}
1645	else {
1646	DWC_DEBUGPL(DBG_PCD, "Remote Wakeup is disabled\n");
1647	}
1648	}
1649	return;
1650	}
1651
1652	/**
1653	* Initiates Session Request Protocol (SRP) to wakeup the host if no
1654	* session is in progress. If a session is already in progress, but
1655	* the device is suspended, remote wakeup signaling is started.
1656	*
1657	*/
1658	static int dwc_otg_pcd_wakeup(struct usb_gadget *gadget)
1659	{
1660	unsigned long flags;
1661	dwc_otg_pcd_t *pcd;
1662	dsts_data_t dsts;
1663	gotgctl_data_t gotgctl;
1664
1665	DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, gadget);
1666
1667	if (gadget == 0) {
1668	return -ENODEV;
1669	}
1670	else {
1671	pcd = container_of(gadget, dwc_otg_pcd_t, gadget);
1672	}
1673	SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
1674
1675	/*
1676	* This function starts the Protocol if no session is in progress. If
1677	* a session is already in progress, but the device is suspended,
1678	* remote wakeup signaling is started.
1679	*/
1680
1681	/* Check if valid session */
1682	gotgctl.d32 = dwc_read_reg32(&(GET_CORE_IF(pcd)->core_global_regs->gotgctl));
1683	if (gotgctl.b.bsesvld) {
1684	/* Check if suspend state */
1685	dsts.d32 = dwc_read_reg32(&(GET_CORE_IF(pcd)->dev_if->dev_global_regs->dsts));
1686	if (dsts.b.suspsts) {
1687	dwc_otg_pcd_remote_wakeup(pcd, 1);
1688	}
1689	}
1690	else {
1691	dwc_otg_pcd_initiate_srp(pcd);
1692	}
1693
1694	SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
1695	return 0;
1696	}
1697
1698	static const struct usb_gadget_ops dwc_otg_pcd_ops =
1699	{
1700	.get_frame = dwc_otg_pcd_get_frame,
1701	.wakeup = dwc_otg_pcd_wakeup,
1702	// current versions must always be self-powered
1703	};
1704
1705	/**
1706	* This function updates the otg values in the gadget structure.
1707	*/
1708	void dwc_otg_pcd_update_otg(dwc_otg_pcd_t *pcd, const unsigned reset)
1709	{
1710
1711	if (!pcd->gadget.is_otg)
1712	return;
1713
1714	if (reset) {
1715	pcd->b_hnp_enable = 0;
1716	pcd->a_hnp_support = 0;
1717	pcd->a_alt_hnp_support = 0;
1718	}
1719
1720	pcd->gadget.b_hnp_enable = pcd->b_hnp_enable;
1721	pcd->gadget.a_hnp_support = pcd->a_hnp_support;
1722	pcd->gadget.a_alt_hnp_support = pcd->a_alt_hnp_support;
1723	}
1724
1725	/**
1726	* This function is the top level PCD interrupt handler.
1727	*/
1728	static irqreturn_t dwc_otg_pcd_irq(int irq, void *dev
1729	#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
1730	, struct pt_regs *r
1731	#endif
1732	)
1733	{
1734	dwc_otg_pcd_t *pcd = dev;
1735	int32_t retval = IRQ_NONE;
1736
1737	retval = dwc_otg_pcd_handle_intr(pcd);
1738	return IRQ_RETVAL(retval);
1739	}
1740
1741	/**
1742	* PCD Callback function for initializing the PCD when switching to
1743	* device mode.
1744	*
1745	* @param p void pointer to the <code>dwc_otg_pcd_t</code>
1746	*/
1747	static int32_t dwc_otg_pcd_start_cb(void *p)
1748	{
1749	dwc_otg_pcd_t pcd = (dwc_otg_pcd_t )p;
1750
1751	/*
1752	* Initialized the Core for Device mode.
1753	*/
1754	if (dwc_otg_is_device_mode(GET_CORE_IF(pcd))) {
1755	dwc_otg_core_dev_init(GET_CORE_IF(pcd));
1756	}
1757	return 1;
1758	}
1759
1760	/**
1761	* PCD Callback function for stopping the PCD when switching to Host
1762	* mode.
1763	*
1764	* @param p void pointer to the <code>dwc_otg_pcd_t</code>
1765	*/
1766	static int32_t dwc_otg_pcd_stop_cb(void *p)
1767	{
1768	dwc_otg_pcd_t pcd = (dwc_otg_pcd_t )p;
1769	extern void dwc_otg_pcd_stop(dwc_otg_pcd_t *_pcd);
1770
1771	dwc_otg_pcd_stop(pcd);
1772	return 1;
1773	}
1774
1775
1776	/**
1777	* PCD Callback function for notifying the PCD when resuming from
1778	* suspend.
1779	*
1780	* @param p void pointer to the <code>dwc_otg_pcd_t</code>
1781	*/
1782	static int32_t dwc_otg_pcd_suspend_cb(void *p)
1783	{
1784	dwc_otg_pcd_t pcd = (dwc_otg_pcd_t )p;
1785
1786	if (pcd->driver && pcd->driver->resume) {
1787	SPIN_UNLOCK(&pcd->lock);
1788	pcd->driver->suspend(&pcd->gadget);
1789	SPIN_LOCK(&pcd->lock);
1790	}
1791
1792	return 1;
1793	}
1794
1795
1796	/**
1797	* PCD Callback function for notifying the PCD when resuming from
1798	* suspend.
1799	*
1800	* @param p void pointer to the <code>dwc_otg_pcd_t</code>
1801	*/
1802	static int32_t dwc_otg_pcd_resume_cb(void *p)
1803	{
1804	dwc_otg_pcd_t pcd = (dwc_otg_pcd_t )p;
1805
1806	if (pcd->driver && pcd->driver->resume) {
1807	SPIN_UNLOCK(&pcd->lock);
1808	pcd->driver->resume(&pcd->gadget);
1809	SPIN_LOCK(&pcd->lock);
1810	}
1811
1812	/* Stop the SRP timeout timer. */
1813	if ((GET_CORE_IF(pcd)->core_params->phy_type != DWC_PHY_TYPE_PARAM_FS) \|\|
1814	(!GET_CORE_IF(pcd)->core_params->i2c_enable)) {
1815	if (GET_CORE_IF(pcd)->srp_timer_started) {
1816	GET_CORE_IF(pcd)->srp_timer_started = 0;
1817	del_timer(&pcd->srp_timer);
1818	}
1819	}
1820	return 1;
1821	}
1822
1823
1824	/**
1825	* PCD Callback structure for handling mode switching.
1826	*/
1827	static dwc_otg_cil_callbacks_t pcd_callbacks =
1828	{
1829	.start = dwc_otg_pcd_start_cb,
1830	.stop = dwc_otg_pcd_stop_cb,
1831	.suspend = dwc_otg_pcd_suspend_cb,
1832	.resume_wakeup = dwc_otg_pcd_resume_cb,
1833	.p = 0, /* Set at registration */
1834	};
1835
1836	/**
1837	* This function is called when the SRP timer expires. The SRP should
1838	* complete within 6 seconds.
1839	*/
1840	static void srp_timeout(unsigned long ptr)
1841	{
1842	gotgctl_data_t gotgctl;
1843	dwc_otg_core_if_t core_if = (dwc_otg_core_if_t )ptr;
1844	volatile uint32_t *addr = &core_if->core_global_regs->gotgctl;
1845
1846	gotgctl.d32 = dwc_read_reg32(addr);
1847
1848	core_if->srp_timer_started = 0;
1849
1850	if ((core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) &&
1851	(core_if->core_params->i2c_enable)) {
1852	DWC_PRINT("SRP Timeout\n");
1853
1854	if ((core_if->srp_success) &&
1855	(gotgctl.b.bsesvld)) {
1856	if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) {
1857	core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p);
1858	}
1859
1860	/* Clear Session Request */
1861	gotgctl.d32 = 0;
1862	gotgctl.b.sesreq = 1;
1863	dwc_modify_reg32(&core_if->core_global_regs->gotgctl,
1864	gotgctl.d32, 0);
1865
1866	core_if->srp_success = 0;
1867	}
1868	else {
1869	DWC_ERROR("Device not connected/responding\n");
1870	gotgctl.b.sesreq = 0;
1871	dwc_write_reg32(addr, gotgctl.d32);
1872	}
1873	}
1874	else if (gotgctl.b.sesreq) {
1875	DWC_PRINT("SRP Timeout\n");
1876
1877	DWC_ERROR("Device not connected/responding\n");
1878	gotgctl.b.sesreq = 0;
1879	dwc_write_reg32(addr, gotgctl.d32);
1880	}
1881	else {
1882	DWC_PRINT(" SRP GOTGCTL=%0x\n", gotgctl.d32);
1883	}
1884	}
1885
1886	/**
1887	* Start the SRP timer to detect when the SRP does not complete within
1888	* 6 seconds.
1889	*
1890	* @param pcd the pcd structure.
1891	*/
1892	void dwc_otg_pcd_start_srp_timer(dwc_otg_pcd_t *pcd)
1893	{
1894	struct timer_list *srp_timer = &pcd->srp_timer;
1895	GET_CORE_IF(pcd)->srp_timer_started = 1;
1896	init_timer(srp_timer);
1897	srp_timer->function = srp_timeout;
1898	srp_timer->data = (unsigned long)GET_CORE_IF(pcd);
1899	srp_timer->expires = jiffies + (HZ*6);
1900	add_timer(srp_timer);
1901	}
1902
1903	/**
1904	* Tasklet
1905	*
1906	*/
1907	extern void start_next_request(dwc_otg_pcd_ep_t *ep);
1908
1909	static void start_xfer_tasklet_func (unsigned long data)
1910	{
1911	dwc_otg_pcd_t pcd = (dwc_otg_pcd_t)data;
1912	dwc_otg_core_if_t *core_if = pcd->otg_dev->core_if;
1913
1914	int i;
1915	depctl_data_t diepctl;
1916
1917	DWC_DEBUGPL(DBG_PCDV, "Start xfer tasklet\n");
1918
1919	diepctl.d32 = dwc_read_reg32(&core_if->dev_if->in_ep_regs[0]->diepctl);
1920
1921	if (pcd->ep0.queue_sof) {
1922	pcd->ep0.queue_sof = 0;
1923	start_next_request (&pcd->ep0);
1924	// break;
1925	}
1926
1927	for (i=0; i<core_if->dev_if->num_in_eps; i++)
1928	{
1929	depctl_data_t diepctl;
1930	diepctl.d32 = dwc_read_reg32(&core_if->dev_if->in_ep_regs[i]->diepctl);
1931
1932	if (pcd->in_ep[i].queue_sof) {
1933	pcd->in_ep[i].queue_sof = 0;
1934	start_next_request (&pcd->in_ep[i]);
1935	// break;
1936	}
1937	}
1938
1939	return;
1940	}
1941
1942
1943
1944
1945
1946
1947
1948	static struct tasklet_struct start_xfer_tasklet = {
1949	.next = NULL,
1950	.state = 0,
1951	.count = ATOMIC_INIT(0),
1952	.func = start_xfer_tasklet_func,
1953	.data = 0,
1954	};
1955	/**
1956	* This function initialized the pcd Dp structures to there default
1957	* state.
1958	*
1959	* @param pcd the pcd structure.
1960	*/
1961	void dwc_otg_pcd_reinit(dwc_otg_pcd_t *pcd)
1962	{
1963	static const char * names[] =
1964	{
1965
1966	"ep0",
1967	"ep1in",
1968	"ep2in",
1969	"ep3in",
1970	"ep4in",
1971	"ep5in",
1972	"ep6in",
1973	"ep7in",
1974	"ep8in",
1975	"ep9in",
1976	"ep10in",
1977	"ep11in",
1978	"ep12in",
1979	"ep13in",
1980	"ep14in",
1981	"ep15in",
1982	"ep1out",
1983	"ep2out",
1984	"ep3out",
1985	"ep4out",
1986	"ep5out",
1987	"ep6out",
1988	"ep7out",
1989	"ep8out",
1990	"ep9out",
1991	"ep10out",
1992	"ep11out",
1993	"ep12out",
1994	"ep13out",
1995	"ep14out",
1996	"ep15out"
1997
1998	};
1999
2000	int i;
2001	int in_ep_cntr, out_ep_cntr;
2002	uint32_t hwcfg1;
2003	uint32_t num_in_eps = (GET_CORE_IF(pcd))->dev_if->num_in_eps;
2004	uint32_t num_out_eps = (GET_CORE_IF(pcd))->dev_if->num_out_eps;
2005	dwc_otg_pcd_ep_t *ep;
2006
2007	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, pcd);
2008
2009	INIT_LIST_HEAD (&pcd->gadget.ep_list);
2010	pcd->gadget.ep0 = &pcd->ep0.ep;
2011	pcd->gadget.speed = USB_SPEED_UNKNOWN;
2012
2013	INIT_LIST_HEAD (&pcd->gadget.ep0->ep_list);
2014
2015	/**
2016	* Initialize the EP0 structure.
2017	*/
2018	ep = &pcd->ep0;
2019
2020	/* Init EP structure */
2021	ep->desc = 0;
2022	ep->pcd = pcd;
2023	ep->stopped = 1;
2024
2025	/* Init DWC ep structure */
2026	ep->dwc_ep.num = 0;
2027	ep->dwc_ep.active = 0;
2028	ep->dwc_ep.tx_fifo_num = 0;
2029	/* Control until ep is actvated */
2030	ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2031	ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
2032	ep->dwc_ep.dma_addr = 0;
2033	ep->dwc_ep.start_xfer_buff = 0;
2034	ep->dwc_ep.xfer_buff = 0;
2035	ep->dwc_ep.xfer_len = 0;
2036	ep->dwc_ep.xfer_count = 0;
2037	ep->dwc_ep.sent_zlp = 0;
2038	ep->dwc_ep.total_len = 0;
2039	ep->queue_sof = 0;
2040	ep->dwc_ep.desc_addr = 0;
2041	ep->dwc_ep.dma_desc_addr = 0;
2042
2043
2044	/* Init the usb_ep structure. */
2045	ep->ep.name = names[0];
2046	ep->ep.ops = (struct usb_ep_ops*)&dwc_otg_pcd_ep_ops;
2047
2048	/**
2049	* @todo NGS: What should the max packet size be set to
2050	* here? Before EP type is set?
2051	*/
2052	ep->ep.maxpacket = MAX_PACKET_SIZE;
2053
2054	list_add_tail (&ep->ep.ep_list, &pcd->gadget.ep_list);
2055
2056	INIT_LIST_HEAD (&ep->queue);
2057	/**
2058	* Initialize the EP structures.
2059	*/
2060	in_ep_cntr = 0;
2061	hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 3;
2062
2063	for (i = 1; in_ep_cntr < num_in_eps; i++)
2064	{
2065	if((hwcfg1 & 0x1) == 0) {
2066	dwc_otg_pcd_ep_t *ep = &pcd->in_ep[in_ep_cntr];
2067	in_ep_cntr ++;
2068
2069	/* Init EP structure */
2070	ep->desc = 0;
2071	ep->pcd = pcd;
2072	ep->stopped = 1;
2073
2074	/* Init DWC ep structure */
2075	ep->dwc_ep.is_in = 1;
2076	ep->dwc_ep.num = i;
2077	ep->dwc_ep.active = 0;
2078	ep->dwc_ep.tx_fifo_num = 0;
2079
2080	/* Control until ep is actvated */
2081	ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2082	ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
2083	ep->dwc_ep.dma_addr = 0;
2084	ep->dwc_ep.start_xfer_buff = 0;
2085	ep->dwc_ep.xfer_buff = 0;
2086	ep->dwc_ep.xfer_len = 0;
2087	ep->dwc_ep.xfer_count = 0;
2088	ep->dwc_ep.sent_zlp = 0;
2089	ep->dwc_ep.total_len = 0;
2090	ep->queue_sof = 0;
2091	ep->dwc_ep.desc_addr = 0;
2092	ep->dwc_ep.dma_desc_addr = 0;
2093
2094	/* Init the usb_ep structure. */
2095	ep->ep.name = names[i];
2096	ep->ep.ops = (struct usb_ep_ops*)&dwc_otg_pcd_ep_ops;
2097
2098	/**
2099	* @todo NGS: What should the max packet size be set to
2100	* here? Before EP type is set?
2101	*/
2102	ep->ep.maxpacket = MAX_PACKET_SIZE;
2103
2104	list_add_tail (&ep->ep.ep_list, &pcd->gadget.ep_list);
2105
2106	INIT_LIST_HEAD (&ep->queue);
2107	}
2108	hwcfg1 >>= 2;
2109	}
2110
2111	out_ep_cntr = 0;
2112	hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 2;
2113
2114	for (i = 1; out_ep_cntr < num_out_eps; i++)
2115	{
2116	if((hwcfg1 & 0x1) == 0) {
2117	dwc_otg_pcd_ep_t *ep = &pcd->out_ep[out_ep_cntr];
2118	out_ep_cntr++;
2119
2120	/* Init EP structure */
2121	ep->desc = 0;
2122	ep->pcd = pcd;
2123	ep->stopped = 1;
2124
2125	/* Init DWC ep structure */
2126	ep->dwc_ep.is_in = 0;
2127	ep->dwc_ep.num = i;
2128	ep->dwc_ep.active = 0;
2129	ep->dwc_ep.tx_fifo_num = 0;
2130	/* Control until ep is actvated */
2131	ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2132	ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
2133	ep->dwc_ep.dma_addr = 0;
2134	ep->dwc_ep.start_xfer_buff = 0;
2135	ep->dwc_ep.xfer_buff = 0;
2136	ep->dwc_ep.xfer_len = 0;
2137	ep->dwc_ep.xfer_count = 0;
2138	ep->dwc_ep.sent_zlp = 0;
2139	ep->dwc_ep.total_len = 0;
2140	ep->queue_sof = 0;
2141
2142	/* Init the usb_ep structure. */
2143	ep->ep.name = names[15 + i];
2144	ep->ep.ops = (struct usb_ep_ops*)&dwc_otg_pcd_ep_ops;
2145	/**
2146	* @todo NGS: What should the max packet size be set to
2147	* here? Before EP type is set?
2148	*/
2149	ep->ep.maxpacket = MAX_PACKET_SIZE;
2150
2151	list_add_tail (&ep->ep.ep_list, &pcd->gadget.ep_list);
2152
2153	INIT_LIST_HEAD (&ep->queue);
2154	}
2155	hwcfg1 >>= 2;
2156	}
2157
2158	/* remove ep0 from the list. There is a ep0 pointer.*/
2159	list_del_init (&pcd->ep0.ep.ep_list);
2160
2161	pcd->ep0state = EP0_DISCONNECT;
2162	pcd->ep0.ep.maxpacket = MAX_EP0_SIZE;
2163	pcd->ep0.dwc_ep.maxpacket = MAX_EP0_SIZE;
2164	pcd->ep0.dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2165	}
2166
2167	/**
2168	* This function releases the Gadget device.
2169	* required by device_unregister().
2170	*
2171	* @todo Should this do something? Should it free the PCD?
2172	*/
2173	static void dwc_otg_pcd_gadget_release(struct device *dev)
2174	{
2175	DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, dev);
2176	}
2177
2178
2179
2180	/**
2181	* This function initialized the PCD portion of the driver.
2182	*
2183	*/
2184
2185	int dwc_otg_pcd_init(struct lm_device *lmdev)
2186	{
2187	static char pcd_name[] = "dwc_otg_pcd";
2188	dwc_otg_pcd_t *pcd;
2189	dwc_otg_core_if_t* core_if;
2190	dwc_otg_dev_if_t* dev_if;
2191	dwc_otg_device_t *otg_dev = lm_get_drvdata(lmdev);
2192	int retval = 0;
2193
2194
2195	DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n",__func__, lmdev);
2196	/*
2197	* Allocate PCD structure
2198	*/
2199	pcd = kmalloc(sizeof(dwc_otg_pcd_t), GFP_KERNEL);
2200
2201	if (pcd == 0) {
2202	return -ENOMEM;
2203	}
2204
2205	memset(pcd, 0, sizeof(dwc_otg_pcd_t));
2206	spin_lock_init(&pcd->lock);
2207
2208	otg_dev->pcd = pcd;
2209	s_pcd = pcd;
2210	pcd->gadget.name = pcd_name;
2211	strcpy(pcd->gadget.dev.bus_id, "gadget");
2212
2213	pcd->otg_dev = lm_get_drvdata(lmdev);
2214
2215	pcd->gadget.dev.parent = &lmdev->dev;
2216	pcd->gadget.dev.release = dwc_otg_pcd_gadget_release;
2217	pcd->gadget.ops = &dwc_otg_pcd_ops;
2218
2219	core_if = GET_CORE_IF(pcd);
2220	dev_if = core_if->dev_if;
2221
2222	if(core_if->hwcfg4.b.ded_fifo_en) {
2223	DWC_PRINT("Dedicated Tx FIFOs mode\n");
2224	}
2225	else {
2226	DWC_PRINT("Shared Tx FIFO mode\n");
2227	}
2228
2229	/* If the module is set to FS or if the PHY_TYPE is FS then the gadget
2230	* should not report as dual-speed capable. replace the following line
2231	* with the block of code below it once the software is debugged for
2232	* this. If is_dualspeed = 0 then the gadget driver should not report
2233	* a device qualifier descriptor when queried. */
2234	if ((GET_CORE_IF(pcd)->core_params->speed == DWC_SPEED_PARAM_FULL) \|\|
2235	((GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type == 2) &&
2236	(GET_CORE_IF(pcd)->hwcfg2.b.fs_phy_type == 1) &&
2237	(GET_CORE_IF(pcd)->core_params->ulpi_fs_ls))) {
2238	pcd->gadget.is_dualspeed = 0;
2239	}
2240	else {
2241	pcd->gadget.is_dualspeed = 1;
2242	}
2243
2244	if ((otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE) \|\|
2245	(otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST) \|\|
2246	(otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) \|\|
2247	(otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) {
2248	pcd->gadget.is_otg = 0;
2249	}
2250	else {
2251	pcd->gadget.is_otg = 1;
2252	}
2253
2254
2255	pcd->driver = 0;
2256	/* Register the gadget device */
2257	retval = device_register(&pcd->gadget.dev);
2258	if (retval != 0) {
2259	kfree (pcd);
2260	return retval;
2261	}
2262
2263
2264	/*
2265	* Initialized the Core for Device mode.
2266	*/
2267	if (dwc_otg_is_device_mode(core_if)) {
2268	dwc_otg_core_dev_init(core_if);
2269	}
2270
2271	/*
2272	* Initialize EP structures
2273	*/
2274	dwc_otg_pcd_reinit(pcd);
2275
2276	/*
2277	* Register the PCD Callbacks.
2278	*/
2279	dwc_otg_cil_register_pcd_callbacks(otg_dev->core_if, &pcd_callbacks,
2280	pcd);
2281	/*
2282	* Setup interupt handler
2283	*/
2284	DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", lmdev->irq);
2285	retval = request_irq(lmdev->irq, dwc_otg_pcd_irq,
2286	SA_SHIRQ, pcd->gadget.name, pcd);
2287	if (retval != 0) {
2288	DWC_ERROR("request of irq%d failed\n", lmdev->irq);
2289	device_unregister(&pcd->gadget.dev);
2290	kfree (pcd);
2291	return -EBUSY;
2292	}
2293
2294	/*
2295	* Initialize the DMA buffer for SETUP packets
2296	*/
2297	if (GET_CORE_IF(pcd)->dma_enable) {
2298	pcd->setup_pkt = dma_alloc_coherent (NULL, sizeof (pcd->setup_pkt) 5, &pcd->setup_pkt_dma_handle, 0);
2299	if (pcd->setup_pkt == 0) {
2300	free_irq(lmdev->irq, pcd);
2301	device_unregister(&pcd->gadget.dev);
2302	kfree (pcd);
2303	return -ENOMEM;
2304	}
2305
2306	pcd->status_buf = dma_alloc_coherent (NULL, sizeof (uint16_t), &pcd->status_buf_dma_handle, 0);
2307	if (pcd->status_buf == 0) {
2308	dma_free_coherent(NULL, sizeof(*pcd->setup_pkt), pcd->setup_pkt, pcd->setup_pkt_dma_handle);
2309	free_irq(lmdev->irq, pcd);
2310	device_unregister(&pcd->gadget.dev);
2311	kfree (pcd);
2312	return -ENOMEM;
2313	}
2314
2315	if (GET_CORE_IF(pcd)->dma_desc_enable) {
2316	dev_if->setup_desc_addr[0] = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_setup_desc_addr[0], 1);
2317	dev_if->setup_desc_addr[1] = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_setup_desc_addr[1], 1);
2318	dev_if->in_desc_addr = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_in_desc_addr, 1);
2319	dev_if->out_desc_addr = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_out_desc_addr, 1);
2320
2321	if(dev_if->setup_desc_addr[0] == 0
2322	\|\| dev_if->setup_desc_addr[1] == 0
2323	\|\| dev_if->in_desc_addr == 0
2324	\|\| dev_if->out_desc_addr == 0 ) {
2325
2326	if(dev_if->out_desc_addr)
2327	dwc_otg_ep_free_desc_chain(dev_if->out_desc_addr, dev_if->dma_out_desc_addr, 1);
2328	if(dev_if->in_desc_addr)
2329	dwc_otg_ep_free_desc_chain(dev_if->in_desc_addr, dev_if->dma_in_desc_addr, 1);
2330	if(dev_if->setup_desc_addr[1])
2331	dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[1], dev_if->dma_setup_desc_addr[1], 1);
2332	if(dev_if->setup_desc_addr[0])
2333	dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[0], dev_if->dma_setup_desc_addr[0], 1);
2334
2335
2336	dma_free_coherent(NULL, sizeof(*pcd->status_buf), pcd->status_buf, pcd->setup_pkt_dma_handle);
2337	dma_free_coherent(NULL, sizeof(*pcd->setup_pkt), pcd->setup_pkt, pcd->setup_pkt_dma_handle);
2338
2339	free_irq(lmdev->irq, pcd);
2340	device_unregister(&pcd->gadget.dev);
2341	kfree (pcd);
2342
2343	return -ENOMEM;
2344	}
2345	}
2346	}
2347	else {
2348	pcd->setup_pkt = kmalloc (sizeof (pcd->setup_pkt) 5, GFP_KERNEL);
2349	if (pcd->setup_pkt == 0) {
2350	free_irq(lmdev->irq, pcd);
2351	device_unregister(&pcd->gadget.dev);
2352	kfree (pcd);
2353	return -ENOMEM;
2354	}
2355
2356	pcd->status_buf = kmalloc (sizeof (uint16_t), GFP_KERNEL);
2357	if (pcd->status_buf == 0) {
2358	kfree(pcd->setup_pkt);
2359	free_irq(lmdev->irq, pcd);
2360	device_unregister(&pcd->gadget.dev);
2361	kfree (pcd);
2362	return -ENOMEM;
2363	}
2364	}
2365
2366
2367	/* Initialize tasklet */
2368	start_xfer_tasklet.data = (unsigned long)pcd;
2369	pcd->start_xfer_tasklet = &start_xfer_tasklet;
2370
2371	return 0;
2372	}
2373
2374	/**
2375	* Cleanup the PCD.
2376	*/
2377	void dwc_otg_pcd_remove(struct lm_device *lmdev)
2378	{
2379	dwc_otg_device_t *otg_dev = lm_get_drvdata(lmdev);
2380	dwc_otg_pcd_t *pcd = otg_dev->pcd;
2381	dwc_otg_dev_if_t* dev_if = GET_CORE_IF(pcd)->dev_if;
2382
2383	DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, lmdev);
2384
2385	/*
2386	* Free the IRQ
2387	*/
2388	free_irq(lmdev->irq, pcd);
2389
2390	/* start with the driver above us */
2391	if (pcd->driver) {
2392	/* should have been done already by driver model core */
2393	DWC_WARN("driver '%s' is still registered\n",
2394	pcd->driver->driver.name);
2395	usb_gadget_unregister_driver(pcd->driver);
2396	}
2397	device_unregister(&pcd->gadget.dev);
2398
2399	if (GET_CORE_IF(pcd)->dma_enable) {
2400	dma_free_coherent (NULL, sizeof (pcd->setup_pkt) 5, pcd->setup_pkt, pcd->setup_pkt_dma_handle);
2401	dma_free_coherent (NULL, sizeof (uint16_t), pcd->status_buf, pcd->status_buf_dma_handle);
2402	if (GET_CORE_IF(pcd)->dma_desc_enable) {
2403	dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[0], dev_if->dma_setup_desc_addr[0], 1);
2404	dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[1], dev_if->dma_setup_desc_addr[1], 1);
2405	dwc_otg_ep_free_desc_chain(dev_if->in_desc_addr, dev_if->dma_in_desc_addr, 1);
2406	dwc_otg_ep_free_desc_chain(dev_if->out_desc_addr, dev_if->dma_out_desc_addr, 1);
2407	}
2408	}
2409	else {
2410	kfree (pcd->setup_pkt);
2411	kfree (pcd->status_buf);
2412	}
2413
2414	kfree(pcd);
2415	otg_dev->pcd = 0;
2416	}
2417
2418	/**
2419	* This function registers a gadget driver with the PCD.
2420	*
2421	* When a driver is successfully registered, it will receive control
2422	* requests including set_configuration(), which enables non-control
2423	* requests. then usb traffic follows until a disconnect is reported.
2424	* then a host may connect again, or the driver might get unbound.
2425	*
2426	* @param driver The driver being registered
2427	*/
2428	int usb_gadget_register_driver(struct usb_gadget_driver *driver)
2429	{
2430	int retval;
2431
2432	DWC_DEBUGPL(DBG_PCD, "registering gadget driver '%s'\n", driver->driver.name);
2433
2434	if (!driver \|\| driver->speed == USB_SPEED_UNKNOWN \|\|
2435	!driver->bind \|\|
2436	!driver->unbind \|\|
2437	!driver->disconnect \|\|
2438	!driver->setup) {
2439	DWC_DEBUGPL(DBG_PCDV,"EINVAL\n");
2440	return -EINVAL;
2441	}
2442	if (s_pcd == 0) {
2443	DWC_DEBUGPL(DBG_PCDV,"ENODEV\n");
2444	return -ENODEV;
2445	}
2446	if (s_pcd->driver != 0) {
2447	DWC_DEBUGPL(DBG_PCDV,"EBUSY (%p)\n", s_pcd->driver);
2448	return -EBUSY;
2449	}
2450
2451	/* hook up the driver */
2452	s_pcd->driver = driver;
2453	s_pcd->gadget.dev.driver = &driver->driver;
2454
2455	DWC_DEBUGPL(DBG_PCD, "bind to driver %s\n", driver->driver.name);
2456	retval = driver->bind(&s_pcd->gadget);
2457	if (retval) {
2458	DWC_ERROR("bind to driver %s --> error %d\n",
2459	driver->driver.name, retval);
2460	s_pcd->driver = 0;
2461	s_pcd->gadget.dev.driver = 0;
2462	return retval;
2463	}
2464	DWC_DEBUGPL(DBG_ANY, "registered gadget driver '%s'\n",
2465	driver->driver.name);
2466	return 0;
2467	}
2468
2469	EXPORT_SYMBOL(usb_gadget_register_driver);
2470
2471	/**
2472	* This function unregisters a gadget driver
2473	*
2474	* @param driver The driver being unregistered
2475	*/
2476	int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2477	{
2478	//DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, _driver);
2479
2480	if (s_pcd == 0) {
2481	DWC_DEBUGPL(DBG_ANY, "%s Return(%d): s_pcd==0\n", __func__,
2482	-ENODEV);
2483	return -ENODEV;
2484	}
2485	if (driver == 0 \|\| driver != s_pcd->driver) {
2486	DWC_DEBUGPL(DBG_ANY, "%s Return(%d): driver?\n", __func__,
2487	-EINVAL);
2488	return -EINVAL;
2489	}
2490
2491	driver->unbind(&s_pcd->gadget);
2492	s_pcd->driver = 0;
2493
2494	DWC_DEBUGPL(DBG_ANY, "unregistered driver '%s'\n",
2495	driver->driver.name);
2496	return 0;
2497	}
2498	EXPORT_SYMBOL(usb_gadget_unregister_driver);
2499
2500	#endif /* DWC_HOST_ONLY */

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root/src/linux/rt2880/linux-2.6.23/drivers/usb/dwc_otg/dwc_otg_pcd.c

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