Changeset 12433 for src/linux/rt2880/linux-2.6.23/drivers/usb/dwc_otg/dwc_otg_driver.c

Timestamp:

07/03/2009 04:48:37 PM (9 months ago)

Author:

BrainSlayer

Message:

fixes usb issues with some devices

Files:

• src/linux/rt2880/linux-2.6.23/drivers/usb/dwc_otg/dwc_otg_driver.c (modified) (65 diffs)

src/linux/rt2880/linux-2.6.23/drivers/usb/dwc_otg/dwc_otg_driver.c

@@ -1 +1 @@
-/* ==========================================================================
- * $File: //dwh/usb_iip/dev/software/otg_ipmate/linux/drivers/dwc_otg_driver.c $
-2
-7-11-30 08:32:28
+7
+8-11-21 05:39:15
- * $Change: 791271 $
- *
@@ -8 +8 @@
- * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
- * otherwise expressly agreed to in writing between Synopsys and you.
- 
+
- * The Software IS NOT an item of Licensed Software or Licensed Product under
- * any End User Software License Agreement or Agreement for Licensed Product
@@ -18 +18 @@
- * Synopsys. If you do not agree with this notice, including the disclaimer
- * below, then you are not authorized to use the Software.
- 
+
- * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -38 +38 @@
- * installed, the dwc_otg_driver_init function is called. When the module is
- * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
- 
+
- * This module also defines a data structure for the dwc_otg_driver, which is
- * used in conjunction with the standard ARM lm_device structure. These
@@ -57 +57 @@
-#include <linux/types.h>
-#include <linux/stat.h>  /* permission constants */
+#include <linux/version.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+# include <linux/irq.h>
+#endif
-
-#include <asm/io.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+# include <asm/irq.h>
+#endif
+
-//#include <asm/arch/lm.h>
-#include <asm/rt2880/lm.h>
@@ -72 +82 @@
-#include "dwc_otg_hcd.h"
-
-60a 22-NOV-2006
+72a 24-JUN-2008
-#define DWC_DRIVER_DESC         "HS OTG USB Controller driver"
-
-static const char dwc_driver_name[] = "dwc_otg";
-
-
-/*-------------------------------------------------------------------------*/
@@ -85 +94 @@
-        .otg_cap = -1,
-        .dma_enable = -1,
+        .dma_desc_enable = -1,
-        .dma_burst_size = -1,
-        .speed = -1,
@@ -93 +103 @@
-        .dev_rx_fifo_size = -1,
-        .dev_nperio_tx_fifo_size = -1,
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-        .host_rx_fifo_size = -1,
-        .host_nperio_tx_fifo_size = -1,
@@ -126 +137 @@
-        .ts_dline = -1,
-        .en_multiple_tx_fifo = -1,
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-        .thr_ctl = -1,
-        .tx_thr_length = -1,
-        .rx_thr_length = -1,
+        .pti_enable = -1,
+        .mpi_enable = -1,
-};
-
@@ -154 +168 @@
-static ssize_t version_show(struct device_driver *dev, char *buf)
-{
-"%s\n", 
-
+ "%s\n",
+       
-}
-static DRIVER_ATTR(version, S_IRUGO, version_show, NULL);
@@ -167 +181 @@
- * This function shows the driver Debug Level.
- */
-_drv, char *_
+drv, char *
-{
-_
+
-}
+
-/**
- * This function stores the driver Debug Level.
- */
-_drv, const char *_buf, 
-                                  size_t _
+drv, const char *buf,
+       size_t 
-{
-_
-_
+
+
-}
-static DRIVER_ATTR(debuglevel, S_IRUGO|S_IWUSR, dbg_level_show, dbg_level_store);
-
-
-/**
@@ -191 +205 @@
-        int i;
-        int retval = 0;
-
+
-/* Checks if the parameter is outside of its valid range of values */
-_low_,
+ _low_, 
-                ((dwc_otg_module_params._param_ < (_low_)) || \
-                (dwc_otg_module_params._param_ > (_high_)))
@@ -199 +213 @@
-/* If the parameter has been set by the user, check that the parameter value is
- * within the value range of values.  If not, report a module error. */
-_low_,_high_,
+ _low_, _high_, 
-                do { \
-                        if (dwc_otg_module_params._param_ != -1) { \
-(_low_),
+ (_low_), 
-                                        DWC_ERROR("`%d' invalid for parameter `%s'\n", \
-
+  
-                                        dwc_otg_module_params._param_ = dwc_param_##_param_##_default; \
- 
+
-                                } \
-                        } \
@@ -214 +228 @@
-        DWC_OTG_PARAM_ERR(otg_cap,0,2,"otg_cap");
-        DWC_OTG_PARAM_ERR(dma_enable,0,1,"dma_enable");
+        DWC_OTG_PARAM_ERR(dma_desc_enable,0,1,"dma_desc_enable");
-        DWC_OTG_PARAM_ERR(speed,0,1,"speed");
-        DWC_OTG_PARAM_ERR(host_support_fs_ls_low_power,0,1,"host_support_fs_ls_low_power");
@@ -235 +250 @@
-        DWC_OTG_PARAM_ERR(ts_dline,0,1,"ts_dline");
-
-
-
+
-                if (DWC_OTG_PARAM_TEST(dma_burst_size,1,1) &&
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
-                                  dwc_otg_module_params.dma_burst_size);
-                        dwc_otg_module_params.dma_burst_size = 32;
- 
+
-                }
-
-
-
-
-
-
+
-                {
-
+
+
+
+
+
+
+
+
+
+
+
+
+
-                                  dwc_otg_module_params.phy_utmi_width);
-                        dwc_otg_module_params.phy_utmi_width = 16;
- 
+
-                }
-        }
-
-
-
+
-                /** @todo should be like above */
-
-
-
-
-
+
+
+
-                                DWC_ERROR("`%d' invalid for parameter `%s_%d'\n",
-                                          dwc_otg_module_params.dev_perio_tx_fifo_size[i], "dev_perio_tx_fifo_size", i);
-                                dwc_otg_module_params.dev_perio_tx_fifo_size[i] = dwc_param_dev_perio_tx_fifo_size_default;
- 
+
-                        }
-                }
-        }
-
-
-
-
-
+
+
+
-                /** @todo should be like above */
-
-
-
-
-
+
+
+
-                                DWC_ERROR("`%d' invalid for parameter `%s_%d'\n",
-                                          dwc_otg_module_params.dev_tx_fifo_size[i], "dev_tx_fifo_size", i);
-                                dwc_otg_module_params.dev_tx_fifo_size[i] = dwc_param_dev_tx_fifo_size_default;
- 
+
-                        }
-                }
@@ -302 +316 @@
-        DWC_OTG_PARAM_ERR(tx_thr_length, 8, 128, "tx_thr_length");
-        DWC_OTG_PARAM_ERR(rx_thr_length, 8, 128, "rx_thr_length");
-
-
+
+
+
+
-        /* At this point, all module parameters that have been set by the user
-         * are valid, and those that have not are left unset.  Now set their
-         * default values and/or check the parameters against the hardware
-         * configurations of the OTG core. */
-
-
-
-/* This sets the parameter to the default value if it has not been set by the
@@ -324 +338 @@
-
-/* This checks the macro agains the hardware configuration to see if it is
-     
+ 
- * case, it will report a module error if the user touched the parameter.
- * Otherwise it will adjust the value without any error. */
-_str_,_is_valid_,
+ _str_, _is_valid_, 
-        ({ \
-       
+
-                int error = 0; \
-                if (!(_is_valid_)) { \
-                        if (changed) { \
-     Check HW configuration.\n", dwc_otg_module_params._param_,
+ Check HW configuration.\n", dwc_otg_module_params._param_, 
-                                error = 1; \
-                        } \
@@ -342 +356 @@
-
-        /* OTG Cap */
-
-  
-  
-  
-  
-  
-  if (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG) valid = 0;
-  break
-  case DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE:
-         if ((core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG) &&
-         (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_SRP_ONLY
-         (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE
-         (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST))
-
-  
-  
-  
-  
-  
-  
-  } 
-  
-  
-       
-       
-       
-       
-       
-       
-
-
- 
+ 
+
+
+
+
+
+if (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG)
+       valid = 0
+       break;
+case DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE:
+if ((core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_HNP_SRP
+    (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG
+    (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) &&
+  (core_if->hwcfg2.b.op_mode != DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) 
+
+
+
+
+
+
+}
+
+       
+
+  
+  
+  
+ 
+ 
+
+ 
+
-                                0);
-
-
-
+
+
+
-                                0);
+
+        retval += DWC_OTG_PARAM_CHECK_VALID(opt, "opt", 1, 0);
-
-        DWC_OTG_PARAM_SET_DEFAULT(dma_burst_size);
@@ -390 +407 @@
-                                        ((dwc_otg_module_params.enable_dynamic_fifo == 0) ||
-                                        (core_if->hwcfg2.b.dynamic_fifo == 1)), 0);
-        
-
-        retval += DWC_OTG_PARAM_CHECK_VALID(data_fifo_size,
@@ -412 +428 @@
-                                        dwc_read_reg32(&core_if->core_global_regs->grxfsiz));
-
-
-        retval += DWC_OTG_PARAM_CHECK_VALID(host_nperio_tx_fifo_size,
-                                        "host_nperio_tx_fifo_size",
@@ -447 +462 @@
- * internal testing only.
- *
- 
+
- */
-
@@ -459 +474 @@
-                                        int valid = 0;
-                                        if ((dwc_otg_module_params.phy_type == DWC_PHY_TYPE_PARAM_UTMI) &&
-
-
-
+
+
-                                                valid = 1;
-                                        }
-                                        else if ((dwc_otg_module_params.phy_type == DWC_PHY_TYPE_PARAM_ULPI) &&
-
-
-
+
+
-                                                valid = 1;
-                                        }
-                                        else if ((dwc_otg_module_params.phy_type == DWC_PHY_TYPE_PARAM_FS) &&
-
-
+
-                                                valid = 1;
-                                        }
@@ -479 +491 @@
-                                ({
-                                        int set = DWC_PHY_TYPE_PARAM_FS;
- 
- 
+
+
-                                                (core_if->hwcfg2.b.hs_phy_type == 1)) {
-                                                        set = DWC_PHY_TYPE_PARAM_UTMI;
@@ -492 +504 @@
-#endif
-
-
+ 
-                                (dwc_otg_module_params.speed == 0) && (dwc_otg_module_params.phy_type == DWC_PHY_TYPE_PARAM_FS) ? 0 : 1,
-                                dwc_otg_module_params.phy_type == DWC_PHY_TYPE_PARAM_FS ? 1 : 0);
@@ -508 +520 @@
-
-#ifdef NO_FS_PHY_HW_CHECKS
-
-
+
-#else
-        retval += DWC_OTG_PARAM_CHECK_VALID(i2c_enable,
@@ -517 +528 @@
-#endif
-
-
-
+
-                int changed = 1;
-                int error = 0;
-
-
-
+
-                        changed = 0;
-                        dwc_otg_module_params.dev_perio_tx_fifo_size[i] = dwc_param_dev_perio_tx_fifo_size_default;
-                }
-
-
-
-
-
+
+
+
-                                error = 1;
-                        }
@@ -539 +546 @@
-        }
-
-
-
-
+
+
-                                                0);
-
-
-
-
-
+
-                int changed = 1;
-                int error = 0;
-
-
-
+
-                        changed = 0;
-                        dwc_otg_module_params.dev_tx_fifo_size[i] = dwc_param_dev_tx_fifo_size_default;
-                }
-
-
-
-
-
+
+
+
-                                error = 1;
-                        }
@@ -566 +566 @@
-                }
-                retval += error;
-
-
-
-
-
+
+
+
+
+
+
-        DWC_OTG_PARAM_SET_DEFAULT(tx_thr_length);
-        DWC_OTG_PARAM_SET_DEFAULT(rx_thr_length);
-
+
+
+
+
+
+
+
+
-        return retval;
-}
-
- 
+
- * This function is the top level interrupt handler for the Common
- * (Device and host modes) interrupts.
- */
-
+
+
+
+
+
-{
-_
+
-        int32_t retval = IRQ_NONE;
-
- otg_dev->core_if 
+otg_dev->core_if
-        return IRQ_RETVAL(retval);
-}
@@ -597 +609 @@
- * of this device are freed.
- *
-_
+
- */
-_
+
-{
-
-
-
-
-
+
+
+
+
-                /* Memory allocation for the dwc_otg_device failed. */
+                DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
-                return;
-        }
-
-        /*
-
-
-
-
-
+
+
+
+
-        }
-
-#ifndef DWC_DEVICE_ONLY
-
-
-
+
+
+
+
+
-        }
-#endif
-
-#ifndef DWC_HOST_ONLY
-
-
-
+
+
-        }
-#endif
-
-
-
+
+
-        }
-
@@ -639 +650 @@
-         * Remove the device attributes
-         */
-_
+
-
-        /*
-         * Return the memory.
-         */
-
-
+
-                iounmap(otg_dev->base);
-        }
-        kfree(otg_dev);
-
+
-        /*
-         * Clear the drvdata pointer.
-         */
- _lmdev, 0 
+lmdev, 0
-}
-
@@ -665 +675 @@
- * structure on subsequent calls to driver methods for this device.
- *
-_
+
- */
-_
+
-{
-        int retval = 0;
+        uint32_t snpsid;
-        dwc_otg_device_t *dwc_otg_device;
-
-
-
-
+
+
+
-
-        dwc_otg_device = kmalloc(sizeof(dwc_otg_device_t), GFP_KERNEL);
-
-
-
-
+
+
+
-                retval = -ENOMEM;
-                goto fail;
-        }
-
+
-        memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
-        dwc_otg_device->reg_offset = 0xFFFFFFFF;
@@ -691 +700 @@
-         * Map the DWC_otg Core memory into virtual address space.
-         */
-
-
-
-
-
+
+
+
+
-                retval = -ENOMEM;
-                goto fail;
-        }
-_
+
-
-        /*
@@ -707 +715 @@
-         */
-        snpsid = dwc_read_reg32((uint32_t *)((uint8_t *)dwc_otg_device->base + 0x40));
-
-
-
-
+
+
+
-                retval = -EINVAL;
-                goto fail;
-        }
-
+        DWC_PRINT("Core Release: %x.%x%x%x\n", 
+                        (snpsid >> 12 & 0xF), 
+                        (snpsid >> 8 & 0xF),
+                        (snpsid >> 4 & 0xF),
+                        (snpsid & 0xF));
+
-        /*
-         * Initialize driver data to point to the global DWC_otg
-         * Device structure.
-         */
-
-
+
+
+
+
+
-        
-
-
-
-
-
+
+
+
+
-                retval = -ENOMEM;
-                goto fail;
-        }
-
+
-        /*
-         * Validate parameter values.
-         */
-
-
+
-                retval = -EINVAL;
-                goto fail;
@@ -742 +756 @@
-        /*
-         * Create Device Attributes in sysfs
-     
- (_
+
+(
-
-        /*
@@ -749 +763 @@
-         * handlers are installed.
-         */
-
+
+
-        /*
-         * Install the interrupt handler for the common interrupts before
-         * enabling common interrupts in core_init below.
-         */
- DBG_CIL, "registering (common) handler for irq%d\n", 
-        _
-_lmdev->irq, dwc_otg_common_irq,SA_SHIRQ, "dwc_otg", dwc_otg_device );
-if (retval != 0) 
-
-_
+DBG_CIL, "registering (common) handler for irq%d\n",
+    
+lmdev->irq, dwc_otg_common_irq,
+                    SA_SHIRQ, "dwc_otg", dwc_otg_device);
+if (retval) 
+
-                retval = -EBUSY;
-                goto fail;
-
-
-
+
-                dwc_otg_device->common_irq_installed = 1;
-        }
-
-#ifdef CONFIG_MACH_IPMATE
-        set_irq_type(_lmdev->irq, IRQT_LOW);
-#endif
-
-        /*
-         * Initialize the DWC_otg core.
-         */
- dwc_otg_device->core_if 
+dwc_otg_device->core_if
-
-#ifndef DWC_HOST_ONLY
@@ -781 +790 @@
-         * Initialize the PCD
-         */
-
-
-
+
+
-                DWC_ERROR("dwc_otg_pcd_init failed\n");
-                dwc_otg_device->pcd = NULL;
@@ -793 +801 @@
-         * Initialize the HCD
-         */
-
-
-
+
+
-                DWC_ERROR("dwc_otg_hcd_init failed\n");
-                dwc_otg_device->hcd = NULL;
@@ -806 +813 @@
-         * handlers are installed.
-         */
- dwc_otg_device->core_if 
+dwc_otg_device->core_if
-
-        return 0;
-
- fail:
-_
+
-        return retval;
-}
-
- 
+
- * This structure defines the methods to be called by a bus driver
- * during the lifecycle of a device on that bus. Both drivers and
@@ -826 +833 @@
- * unregistered with the bus driver.
- */
-
-
-
-
-
-
+
+
+
+
-        .probe          = dwc_otg_driver_probe,
-        .remove         = dwc_otg_driver_remove,
-};
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-/**
@@ -847 +880 @@
- * @return
- */
- 
+
-{
-        int retval = 0;
-        struct lm_device *lmdev;
-
+
+
-        *(unsigned long *)(KSEG1ADDR(RALINK_USB_OTG_BASE+0xE00)) = 0x0; //Enable USB Port
-
+
-        lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
-
-        if (!lmdev)
-        {
@@ -871 +904 @@
-        printk(KERN_INFO "%s: version %s\n", dwc_driver_name, DWC_DRIVER_VERSION);
-        retval = lm_driver_register(&dwc_otg_driver);
-
-
+
-                printk(KERN_ERR "%s retval=%d\n", __func__, retval);
-                return retval;
-        }
-
-
+error = 
+error = 
-
-        return retval;
@@ -883 +915 @@
-module_init(dwc_otg_driver_init);
-
- 
+
- * This function is called when the driver is removed from the kernel
- * with the rmmod command. The driver unregisters itself with its bus
@@ -897 +929 @@
-
-        lm_driver_unregister(&dwc_otg_driver);
-
+
-        *(unsigned long *)(KSEG1ADDR(RALINK_USB_OTG_BASE+0xE00)) = 0xF; //Disable USB Port
-        printk(KERN_INFO "%s module removed\n", dwc_driver_name);
@@ -913 +945 @@
-module_param_named(dma_enable, dwc_otg_module_params.dma_enable, int, 0444);
-MODULE_PARM_DESC(dma_enable, "DMA Mode 0=Slave 1=DMA enabled");
+
+module_param_named(dma_desc_enable, dwc_otg_module_params.dma_desc_enable, int, 0444);
+MODULE_PARM_DESC(dma_desc_enable, "DMA Desc Mode 0=Address DMA 1=DMA Descriptor enabled");
+
-module_param_named(dma_burst_size, dwc_otg_module_params.dma_burst_size, int, 0444);
-MODULE_PARM_DESC(dma_burst_size, "DMA Burst Size 1, 4, 8, 16, 32, 64, 128, 256");
@@ -1030 +1066 @@
-module_param_named(rx_thr_length, dwc_otg_module_params.rx_thr_length, int, 0444);
-MODULE_PARM_DESC(rx_thr_length, "Rx Threshold length in 32 bit DWORDs");
+
+module_param_named(pti_enable, dwc_otg_module_params.pti_enable, int, 0444);
+MODULE_PARM_DESC(pti_enable, "Per Transfer Interrupt mode 0=disabled 1=enabled");
+
+module_param_named(mpi_enable, dwc_otg_module_params.mpi_enable, int, 0444);
+MODULE_PARM_DESC(mpi_enable, "Multiprocessor Interrupt mode 0=disabled 1=enabled");
+
-/** @page "Module Parameters"
- *
- * The following parameters may be specified when starting the module.
- * These parameters define how the DWC_otg controller should be
- 
+ 
- * function dwc_otg_cil_init
- *
- * Example: <code>modprobe dwc_otg speed=1 otg_cap=1</code>
- *
-
+
- <table>
- 
-
+
+
- <tr>
- <td>otg_cap</td>
@@ -1051 +1094 @@
- - 2: No HNP/SRP capable
- </td></tr>
-
+
- <tr>
- <td>dma_enable</td>
@@ -1060 +1103 @@
- - 1: DMA (default, if available)
- </td></tr>
-
+
- <tr>
- <td>dma_burst_size</td>
@@ -1066 +1109 @@
- - Values: 1, 4, 8 16, 32, 64, 128, 256 (default 32)
- </td></tr>
-
+
- <tr>
- <td>speed</td>
@@ -1075 +1118 @@
- - 1: Full Speed
- </td></tr>
-
+
- <tr>
- <td>host_support_fs_ls_low_power</td>
@@ -1083 +1126 @@
- - 1: Support low power mode
- </td></tr>
-
+
- <tr>
- <td>host_ls_low_power_phy_clk</td>
@@ -1092 +1135 @@
- - 1: 6 MHz
- </td></tr>
-
+
- <tr>
- <td>enable_dynamic_fifo</td>
@@ -1099 +1142 @@
- - 1: Allow dynamic FIFO sizing (default)
- </td></tr>
-
+
- <tr>
- <td>data_fifo_size</td>
@@ -1108 +1151 @@
- Note: The total FIFO memory depth in the FPGA configuration is 8192.
- </td></tr>
-
+
- <tr>
- <td>dev_rx_fifo_size</td>
@@ -1115 +1158 @@
- - Values: 16 to 32768 (default 1064)
- </td></tr>
-
+
- <tr>
- <td>dev_nperio_tx_fifo_size</td>
@@ -1122 +1165 @@
- - Values: 16 to 32768 (default 1024)
- </td></tr>
-
+
- <tr>
- <td>dev_perio_tx_fifo_size_n (n = 1 to 15)</td>
@@ -1129 +1172 @@
- - Values: 4 to 768 (default 256)
- </td></tr>
-
+
- <tr>
- <td>host_rx_fifo_size</td>
@@ -1136 +1179 @@
- - Values: 16 to 32768 (default 1024)
- </td></tr>
-
+
- <tr>
- <td>host_nperio_tx_fifo_size</td>
@@ -1143 +1186 @@
- - Values: 16 to 32768 (default 1024)
- </td></tr>
-
+
- <tr>
- <td>host_perio_tx_fifo_size</td>
@@ -1150 +1193 @@
- - Values: 16 to 32768 (default 1024)
- </td></tr>
-
+
- <tr>
- <td>max_transfer_size</td>
@@ -1156 +1199 @@
- - Values: 2047 to 65,535 (default 65,535)
- </td></tr>
-
+
- <tr>
- <td>max_packet_count</td>
@@ -1162 +1205 @@
- - Values: 15 to 511 (default 511)
- </td></tr>
-
+
- <tr>
- <td>host_channels</td>
@@ -1170 +1213 @@
- Note: The FPGA configuration supports a maximum of 12 host channels.
- </td></tr>
-
+
- <tr>
- <td>dev_endpoints</td>
@@ -1180 +1223 @@
- addition to EP0.
- </td></tr>
-
+
- <tr>
- <td>phy_type</td>
@@ -1189 +1232 @@
- - 2: ULPI
- </td></tr>
-
+
- <tr>
- <td>phy_utmi_width</td>
@@ -1198 +1241 @@
- - Values: 8 or 16 bits (default 16)
- </td></tr>
-
+
- <tr>
- <td>phy_ulpi_ddr</td>